summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorRichard Osborne <richard@xmos.com>2012-12-16 16:46:31 +0000
committerRichard Osborne <richard@xmos.com>2012-12-16 16:46:31 +0000
commit054169be24bb4eb68215fd1d52d0c4da1c165d0f (patch)
tree79c84a96893ca2fd8cadda85302bda69f52ba322
parent1fb0aaa58fb5c2fee2ae5f504bd8c09ecd6d94f2 (diff)
downloadllvm-054169be24bb4eb68215fd1d52d0c4da1c165d0f.tar.gz
llvm-054169be24bb4eb68215fd1d52d0c4da1c165d0f.tar.bz2
llvm-054169be24bb4eb68215fd1d52d0c4da1c165d0f.tar.xz
Remove invalid instruction encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170291 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/XCore/XCoreInstrFormats.td18
1 files changed, 0 insertions, 18 deletions
diff --git a/lib/Target/XCore/XCoreInstrFormats.td b/lib/Target/XCore/XCoreInstrFormats.td
index 9efd79af2b..d905a5c6ed 100644
--- a/lib/Target/XCore/XCoreInstrFormats.td
+++ b/lib/Target/XCore/XCoreInstrFormats.td
@@ -34,90 +34,72 @@ class PseudoInstXCore<dag outs, dag ins, string asmstr, list<dag> pattern>
class _F3R<dag outs, dag ins, string asmstr, list<dag> pattern>
: InstXCore<2, outs, ins, asmstr, pattern> {
- let Inst{31-0} = 0;
}
class _FL3R<dag outs, dag ins, string asmstr, list<dag> pattern>
: InstXCore<4, outs, ins, asmstr, pattern> {
- let Inst{31-0} = 0;
}
class _F2RUS<dag outs, dag ins, string asmstr, list<dag> pattern>
: InstXCore<2, outs, ins, asmstr, pattern> {
- let Inst{31-0} = 0;
}
class _FL2RUS<dag outs, dag ins, string asmstr, list<dag> pattern>
: InstXCore<4, outs, ins, asmstr, pattern> {
- let Inst{31-0} = 0;
}
class _FRU6<dag outs, dag ins, string asmstr, list<dag> pattern>
: InstXCore<2, outs, ins, asmstr, pattern> {
- let Inst{31-0} = 0;
}
class _FLRU6<dag outs, dag ins, string asmstr, list<dag> pattern>
: InstXCore<4, outs, ins, asmstr, pattern> {
- let Inst{31-0} = 0;
}
class _FU6<dag outs, dag ins, string asmstr, list<dag> pattern>
: InstXCore<2, outs, ins, asmstr, pattern> {
- let Inst{31-0} = 0;
}
class _FLU6<dag outs, dag ins, string asmstr, list<dag> pattern>
: InstXCore<4, outs, ins, asmstr, pattern> {
- let Inst{31-0} = 0;
}
class _FU10<dag outs, dag ins, string asmstr, list<dag> pattern>
: InstXCore<2, outs, ins, asmstr, pattern> {
- let Inst{31-0} = 0;
}
class _FLU10<dag outs, dag ins, string asmstr, list<dag> pattern>
: InstXCore<4, outs, ins, asmstr, pattern> {
- let Inst{31-0} = 0;
}
class _F2R<dag outs, dag ins, string asmstr, list<dag> pattern>
: InstXCore<2, outs, ins, asmstr, pattern> {
- let Inst{31-0} = 0;
}
class _FRUS<dag outs, dag ins, string asmstr, list<dag> pattern>
: InstXCore<2, outs, ins, asmstr, pattern> {
- let Inst{31-0} = 0;
}
class _FL2R<dag outs, dag ins, string asmstr, list<dag> pattern>
: InstXCore<4, outs, ins, asmstr, pattern> {
- let Inst{31-0} = 0;
}
class _F1R<dag outs, dag ins, string asmstr, list<dag> pattern>
: InstXCore<2, outs, ins, asmstr, pattern> {
- let Inst{31-0} = 0;
}
class _F0R<dag outs, dag ins, string asmstr, list<dag> pattern>
: InstXCore<2, outs, ins, asmstr, pattern> {
- let Inst{31-0} = 0;
}
class _L4R<dag outs, dag ins, string asmstr, list<dag> pattern>
: InstXCore<4, outs, ins, asmstr, pattern> {
- let Inst{31-0} = 0;
}
class _L5R<dag outs, dag ins, string asmstr, list<dag> pattern>
: InstXCore<4, outs, ins, asmstr, pattern> {
- let Inst{31-0} = 0;
}
class _L6R<dag outs, dag ins, string asmstr, list<dag> pattern>
: InstXCore<4, outs, ins, asmstr, pattern> {
- let Inst{31-0} = 0;
}