Fix a (u)comiss intrinsic lowering bug. It was using anyext which can return junk in higher bits. Patch by Nate Begeman.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54903 91177308-0d34-0410-b5e6-96231b3b80d8

4 files changed, 13 insertions, 101 deletions

diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp
index b76d3e23cf..2bd875e92e 100644
--- a/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -1515,6 +1515,8 @@ SDNode *X86DAGToDAGISel::Select(SDValue N) {
       SDValue N0 = Node->getOperand(0);
       // Get the subregsiter index for the type to extend.
       MVT N0VT = N0.getValueType();
+      // FIXME: In x86-32, 8-bit value may be in AH, etc. which don't have
+      // super-registers.
       unsigned Idx = (N0VT == MVT::i32) ? X86::SUBREG_32BIT :
                       (N0VT == MVT::i16) ? X86::SUBREG_16BIT :
                         (Subtarget->is64Bit()) ? X86::SUBREG_8BIT : 0;
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index f99b14788c..f5e9b08f5c 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -5419,8 +5419,8 @@ X86TargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) {
 
     SDValue Cond = DAG.getNode(Opc, MVT::i32, LHS, RHS);
     SDValue SetCC = DAG.getNode(X86ISD::SETCC, MVT::i8,
-                                  DAG.getConstant(X86CC, MVT::i8), Cond);
-    return DAG.getNode(ISD::ANY_EXTEND, MVT::i32, SetCC);
+                                DAG.getConstant(X86CC, MVT::i8), Cond);
+    return DAG.getNode(ISD::ZERO_EXTEND, MVT::i32, SetCC);
   }
 
   // Fix vector shift instructions where the last operand is a non-immediate
diff --git a/test/CodeGen/X86/2008-08-17-UComiCodeGenBug.ll b/test/CodeGen/X86/2008-08-17-UComiCodeGenBug.ll
new file mode 100644
index 0000000000..b09211d9ef
--- /dev/null
+++ b/test/CodeGen/X86/2008-08-17-UComiCodeGenBug.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movzbl
+
+define i32 @foo(<4 x float> %a, <4 x float> %b) nounwind {
+entry:
+	tail call i32 @llvm.x86.sse.ucomige.ss( <4 x float> %a, <4 x float> %b ) nounwind readnone
+	ret i32 %0
+}
+
+declare i32 @llvm.x86.sse.ucomige.ss(<4 x float>, <4 x float>) nounwind readnone
diff --git a/test/Transforms/LoopStrengthReduce/2008-08-14-ShadowIV.ll b/test/Transforms/LoopStrengthReduce/2008-08-14-ShadowIV.ll
index 2377589b0e..e69de29bb2 100644
--- a/test/Transforms/LoopStrengthReduce/2008-08-14-ShadowIV.ll
+++ b/test/Transforms/LoopStrengthReduce/2008-08-14-ShadowIV.ll
@@ -1,99 +0,0 @@
-; RUN: llvm-as < %s | opt -loop-reduce | llvm-dis | grep "phi double" | count 1
-
-define void @foobar(i32 %n) nounwind {
-entry:
-	icmp eq i32 %n, 0		; <i1>:0 [#uses=2]
-	br i1 %0, label %return, label %bb.nph
-
-bb.nph:		; preds = %entry
-	%umax = select i1 %0, i32 1, i32 %n		; <i32> [#uses=1]
-	br label %bb
-
-bb:		; preds = %bb, %bb.nph
-	%i.03 = phi i32 [ 0, %bb.nph ], [ %indvar.next, %bb ]		; <i32> [#uses=3]
-	tail call void @bar( i32 %i.03 ) nounwind
-	uitofp i32 %i.03 to double		; <double>:1 [#uses=1]
-	tail call void @foo( double %1 ) nounwind
-	%indvar.next = add i32 %i.03, 1		; <i32> [#uses=2]
-	%exitcond = icmp eq i32 %indvar.next, %umax		; <i1> [#uses=1]
-	br i1 %exitcond, label %return, label %bb
-
-return:		; preds = %bb, %entry
-	ret void
-}
-
-; Unable to eliminate cast because the mantissa bits for double are not enough
-; to hold all of i64 IV bits.
-define void @foobar2(i64 %n) nounwind {
-entry:
-	icmp eq i64 %n, 0		; <i1>:0 [#uses=2]
-	br i1 %0, label %return, label %bb.nph
-
-bb.nph:		; preds = %entry
-	%umax = select i1 %0, i64 1, i64 %n		; <i64> [#uses=1]
-	br label %bb
-
-bb:		; preds = %bb, %bb.nph
-	%i.03 = phi i64 [ 0, %bb.nph ], [ %indvar.next, %bb ]		; <i64> [#uses=3]
-	trunc i64 %i.03 to i32		; <i32>:1 [#uses=1]
-	tail call void @bar( i32 %1 ) nounwind
-	uitofp i64 %i.03 to double		; <double>:2 [#uses=1]
-	tail call void @foo( double %2 ) nounwind
-	%indvar.next = add i64 %i.03, 1		; <i64> [#uses=2]
-	%exitcond = icmp eq i64 %indvar.next, %umax		; <i1> [#uses=1]
-	br i1 %exitcond, label %return, label %bb
-
-return:		; preds = %bb, %entry
-	ret void
-}
-
-; Unable to eliminate cast due to potentional overflow.
-define void @foobar3() nounwind {
-entry:
-	tail call i32 (...)* @nn( ) nounwind		; <i32>:0 [#uses=1]
-	icmp eq i32 %0, 0		; <i1>:1 [#uses=1]
-	br i1 %1, label %return, label %bb
-
-bb:		; preds = %bb, %entry
-	%i.03 = phi i32 [ 0, %entry ], [ %3, %bb ]		; <i32> [#uses=3]
-	tail call void @bar( i32 %i.03 ) nounwind
-	uitofp i32 %i.03 to double		; <double>:2 [#uses=1]
-	tail call void @foo( double %2 ) nounwind
-	add i32 %i.03, 1		; <i32>:3 [#uses=2]
-	tail call i32 (...)* @nn( ) nounwind		; <i32>:4 [#uses=1]
-	icmp ugt i32 %4, %3		; <i1>:5 [#uses=1]
-	br i1 %5, label %bb, label %return
-
-return:		; preds = %bb, %entry
-	ret void
-}
-
-; Unable to eliminate cast due to overflow.
-define void @foobar4() nounwind {
-entry:
-	br label %bb.nph
-
-bb.nph:		; preds = %entry
-	br label %bb
-
-bb:		; preds = %bb, %bb.nph
-	%i.03 = phi i8 [ 0, %bb.nph ], [ %indvar.next, %bb ]		; <i32> [#uses=3]
-	%tmp2 = sext i8 %i.03 to i32		; <i32>:0 [#uses=1]
-	tail call void @bar( i32 %tmp2 ) nounwind
-	%tmp3 = uitofp i8 %i.03 to double		; <double>:1 [#uses=1]
-	tail call void @foo( double %tmp3 ) nounwind
-	%indvar.next = add i8 %i.03, 1		; <i32> [#uses=2]
-        %tmp = sext i8 %indvar.next to i32
-	%exitcond = icmp eq i32 %tmp, 32767		; <i1> [#uses=1]
-	br i1 %exitcond, label %return, label %bb
-
-return:		; preds = %bb, %entry
-	ret void
-}
-
-declare void @bar(i32)
-
-declare void @foo(double)
-
-declare i32 @nn(...)
-