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| author | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2008-08-08 04:09:57 +0000 |
|---|---|---|
| committer | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2008-08-08 04:09:57 +0000 |
| commit | 0b4e136c74fedb708ab424288b12feab0f13d73e (patch) | |
| tree | 52c91d1a8a9971c5bd63e34d27d96b4f16b456ee | |
| parent | 29b4ff7c736c298ef2f866a580ed6ee063cc59a7 (diff) | |
| download | llvm-0b4e136c74fedb708ab424288b12feab0f13d73e.tar.gz llvm-0b4e136c74fedb708ab424288b12feab0f13d73e.tar.bz2 llvm-0b4e136c74fedb708ab424288b12feab0f13d73e.tar.xz | |
Batch 5 of Mips CodeGen tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54510 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | test/CodeGen/Mips/2008-07-29-icmp.ll | 12 | ||||
| -rw-r--r-- | test/CodeGen/Mips/2008-07-31-fcopysign.ll | 14 | ||||
| -rw-r--r-- | test/CodeGen/Mips/2008-08-01-AsmInline.ll | 17 |
3 files changed, 43 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/2008-07-29-icmp.ll b/test/CodeGen/Mips/2008-07-29-icmp.ll new file mode 100644 index 0000000000..ee2b71fa23 --- /dev/null +++ b/test/CodeGen/Mips/2008-07-29-icmp.ll @@ -0,0 +1,12 @@ +; RUN: llvm-as < %s | llc -enable-legalize-types -march=mips | \ +; RUN: grep {b\[ne\]\[eq\]} | count 1 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "mipsallegrexel-psp-elf" + +define float @A(float %a, float %b, i32 %j) nounwind { +entry: + icmp sgt i32 %j, 1 ; <i1>:0 [#uses=1] + %.0 = select i1 %0, float %a, float %b ; <float> [#uses=1] + ret float %.0 +} diff --git a/test/CodeGen/Mips/2008-07-31-fcopysign.ll b/test/CodeGen/Mips/2008-07-31-fcopysign.ll new file mode 100644 index 0000000000..a1f4443d64 --- /dev/null +++ b/test/CodeGen/Mips/2008-07-31-fcopysign.ll @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | llc -enable-legalize-types -march=mips -f -o %t +; RUN: grep abs.s %t | count 1 +; RUN: grep neg.s %t | count 1 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "mipsallegrexel-psp-elf" + +define float @A(float %i, float %j) nounwind { +entry: + tail call float @copysignf( float %i, float %j ) nounwind readnone ; <float>:0 [#uses=1] + ret float %0 +} + +declare float @copysignf(float, float) nounwind readnone diff --git a/test/CodeGen/Mips/2008-08-01-AsmInline.ll b/test/CodeGen/Mips/2008-08-01-AsmInline.ll new file mode 100644 index 0000000000..1bd645af73 --- /dev/null +++ b/test/CodeGen/Mips/2008-08-01-AsmInline.ll @@ -0,0 +1,17 @@ +; RUN: llvm-as < %s | llc -enable-legalize-types -march=mips -f -o %t +; RUN: grep mfhi %t | count 1 +; RUN: grep mflo %t | count 1 +; RUN: grep multu %t | count 1 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" +target triple = "mipsallegrexel-psp-elf" + %struct.DWstruct = type { i32, i32 } + +define i32 @A0(i32 %u, i32 %v) nounwind { +entry: + %asmtmp = tail call %struct.DWstruct asm "multu $2,$3", "={lo},={hi},d,d"( i32 %u, i32 %v ) nounwind + %asmresult = extractvalue %struct.DWstruct %asmtmp, 0 + %asmresult1 = extractvalue %struct.DWstruct %asmtmp, 1 ; <i32> [#uses=1] + %res = add i32 %asmresult, %asmresult1 + ret i32 %res +} |