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author | Andrew Trick <atrick@apple.com> | 2013-08-23 17:48:53 +0000 |
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committer | Andrew Trick <atrick@apple.com> | 2013-08-23 17:48:53 +0000 |
commit | 12d3dc73dc44acd8b11cca783b826ccbd66f44da (patch) | |
tree | 0b29ae125eadf532ba8779a8d0adc7a1b8cc7196 | |
parent | 751c6d28780e9e852f71aff63de608cff6a146ec (diff) | |
download | llvm-12d3dc73dc44acd8b11cca783b826ccbd66f44da.tar.gz llvm-12d3dc73dc44acd8b11cca783b826ccbd66f44da.tar.bz2 llvm-12d3dc73dc44acd8b11cca783b826ccbd66f44da.tar.xz |
PrintVRegOrUnit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189124 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | include/llvm/Target/TargetRegisterInfo.h | 16 | ||||
-rw-r--r-- | lib/CodeGen/TargetRegisterInfo.cpp | 8 |
2 files changed, 24 insertions, 0 deletions
diff --git a/include/llvm/Target/TargetRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h index 82fccde8de..958bea6f2b 100644 --- a/include/llvm/Target/TargetRegisterInfo.h +++ b/include/llvm/Target/TargetRegisterInfo.h @@ -901,6 +901,7 @@ static inline raw_ostream &operator<<(raw_ostream &OS, const PrintReg &PR) { /// Usage: OS << PrintRegUnit(Unit, TRI) << '\n'; /// class PrintRegUnit { +protected: const TargetRegisterInfo *TRI; unsigned Unit; public: @@ -914,6 +915,21 @@ static inline raw_ostream &operator<<(raw_ostream &OS, const PrintRegUnit &PR) { return OS; } +/// PrintVRegOrUnit - It is often convenient to track virtual registers and +/// physical register units in the same list. +class PrintVRegOrUnit : protected PrintRegUnit { +public: + PrintVRegOrUnit(unsigned VRegOrUnit, const TargetRegisterInfo *tri) + : PrintRegUnit(VRegOrUnit, tri) {} + void print(raw_ostream&) const; +}; + +static inline raw_ostream &operator<<(raw_ostream &OS, + const PrintVRegOrUnit &PR) { + PR.print(OS); + return OS; +} + } // End llvm namespace #endif diff --git a/lib/CodeGen/TargetRegisterInfo.cpp b/lib/CodeGen/TargetRegisterInfo.cpp index ffcee1f51d..5a1524364b 100644 --- a/lib/CodeGen/TargetRegisterInfo.cpp +++ b/lib/CodeGen/TargetRegisterInfo.cpp @@ -73,6 +73,14 @@ void PrintRegUnit::print(raw_ostream &OS) const { OS << '~' << TRI->getName(*Roots); } +void PrintVRegOrUnit::print(raw_ostream &OS) const { + if (TRI && TRI->isVirtualRegister(Unit)) { + OS << "%vreg" << TargetRegisterInfo::virtReg2Index(Unit); + return; + } + PrintRegUnit::print(OS); +} + /// getAllocatableClass - Return the maximal subclass of the given register /// class that is alloctable, or NULL. const TargetRegisterClass * |