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author | Michael Liao <michael.liao@intel.com> | 2013-05-02 09:22:04 +0000 |
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committer | Michael Liao <michael.liao@intel.com> | 2013-05-02 09:22:04 +0000 |
commit | 299eb2e6e15f0df73ce6202849fd2b4f0713cc1f (patch) | |
tree | 9031832a1f2d90217be3357a7dc0e04df2af8495 | |
parent | db7da200a40e9496809b4981443150dd481e1814 (diff) | |
download | llvm-299eb2e6e15f0df73ce6202849fd2b4f0713cc1f.tar.gz llvm-299eb2e6e15f0df73ce6202849fd2b4f0713cc1f.tar.bz2 llvm-299eb2e6e15f0df73ce6202849fd2b4f0713cc1f.tar.xz |
80-col fixup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180915 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 7eb4f6b43c..26ad64eeca 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -11032,7 +11032,8 @@ SDValue X86TargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const { unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue(); unsigned FrameReg = RegInfo->getFrameRegister(DAG.getMachineFunction()); assert(((FrameReg == X86::RBP && VT == MVT::i64) || - (FrameReg == X86::EBP && VT == MVT::i32)) && "Invalid Frame Register!"); + (FrameReg == X86::EBP && VT == MVT::i32)) && + "Invalid Frame Register!"); SDValue FrameAddr = DAG.getCopyFromReg(DAG.getEntryNode(), dl, FrameReg, VT); while (Depth--) FrameAddr = DAG.getLoad(VT, dl, DAG.getEntryNode(), FrameAddr, @@ -11061,7 +11062,7 @@ SDValue X86TargetLowering::LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const { unsigned StoreAddrReg = (PtrVT == MVT::i64) ? X86::RCX : X86::ECX; SDValue StoreAddr = DAG.getNode(ISD::ADD, dl, PtrVT, Frame, - DAG.getIntPtrConstant(RegInfo->getSlotSize())); + DAG.getIntPtrConstant(RegInfo->getSlotSize())); StoreAddr = DAG.getNode(ISD::ADD, dl, PtrVT, StoreAddr, Offset); Chain = DAG.getStore(Chain, dl, Handler, StoreAddr, MachinePointerInfo(), false, false, 0); |