diff options
author | Akira Hatanaka <ahatanaka@mips.com> | 2011-12-05 21:03:03 +0000 |
---|---|---|
committer | Akira Hatanaka <ahatanaka@mips.com> | 2011-12-05 21:03:03 +0000 |
commit | 2bf08ec854de4f393914057287d57ea2fd5d456d (patch) | |
tree | da1bbcb2da37766c99039fde344dc90f90c6fe34 | |
parent | 253ef7a77930f6855a5bf24037e9dfbc65a1ee85 (diff) | |
download | llvm-2bf08ec854de4f393914057287d57ea2fd5d456d.tar.gz llvm-2bf08ec854de4f393914057287d57ea2fd5d456d.tar.bz2 llvm-2bf08ec854de4f393914057287d57ea2fd5d456d.tar.xz |
Have LowerJumpTable support Mips64. Modify 2010-07-20-Switch.ll to test N64 and
O32 with relocation-model=pic too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145850 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/Mips/MipsISelLowering.cpp | 36 | ||||
-rw-r--r-- | test/CodeGen/Mips/2010-07-20-Switch.ll | 18 |
2 files changed, 29 insertions, 25 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index b5a15cf36d..205116918e 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -130,6 +130,7 @@ MipsTargetLowering(MipsTargetMachine &TM) setOperationAction(ISD::BlockAddress, MVT::i64, Custom); setOperationAction(ISD::GlobalTLSAddress, MVT::i32, Custom); setOperationAction(ISD::JumpTable, MVT::i32, Custom); + setOperationAction(ISD::JumpTable, MVT::i64, Custom); setOperationAction(ISD::ConstantPool, MVT::i32, Custom); setOperationAction(ISD::ConstantPool, MVT::i64, Custom); setOperationAction(ISD::SELECT, MVT::f32, Custom); @@ -1594,34 +1595,29 @@ LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const SDValue MipsTargetLowering:: LowerJumpTable(SDValue Op, SelectionDAG &DAG) const { - SDValue ResNode; - SDValue HiPart; + SDValue HiPart, JTI, JTILo; // FIXME there isn't actually debug info here DebugLoc dl = Op.getDebugLoc(); bool IsPIC = getTargetMachine().getRelocationModel() == Reloc::PIC_; - unsigned char OpFlag = IsPIC ? MipsII::MO_GOT : MipsII::MO_ABS_HI; - EVT PtrVT = Op.getValueType(); - JumpTableSDNode *JT = cast<JumpTableSDNode>(Op); + JumpTableSDNode *JT = cast<JumpTableSDNode>(Op); - SDValue JTI = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, OpFlag); - - if (!IsPIC) { - SDValue Ops[] = { JTI }; - HiPart = DAG.getNode(MipsISD::Hi, dl, DAG.getVTList(MVT::i32), Ops, 1); + if (!IsPIC && !IsN64) { + JTI = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, MipsII::MO_ABS_HI); + HiPart = DAG.getNode(MipsISD::Hi, dl, PtrVT, JTI); + JTILo = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, MipsII::MO_ABS_LO); } else {// Emit Load from Global Pointer - JTI = DAG.getNode(MipsISD::WrapperPIC, dl, MVT::i32, JTI); - HiPart = DAG.getLoad(MVT::i32, dl, DAG.getEntryNode(), JTI, - MachinePointerInfo(), - false, false, false, 0); + unsigned GOTFlag = IsN64 ? MipsII::MO_GOT_PAGE : MipsII::MO_GOT; + unsigned OfstFlag = IsN64 ? MipsII::MO_GOT_OFST : MipsII::MO_ABS_LO; + JTI = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, GOTFlag); + JTI = DAG.getNode(MipsISD::WrapperPIC, dl, PtrVT, JTI); + HiPart = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), JTI, + MachinePointerInfo(), false, false, false, 0); + JTILo = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, OfstFlag); } - SDValue JTILo = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, - MipsII::MO_ABS_LO); - SDValue Lo = DAG.getNode(MipsISD::Lo, dl, MVT::i32, JTILo); - ResNode = DAG.getNode(ISD::ADD, dl, MVT::i32, HiPart, Lo); - - return ResNode; + SDValue Lo = DAG.getNode(MipsISD::Lo, dl, PtrVT, JTILo); + return DAG.getNode(ISD::ADD, dl, PtrVT, HiPart, Lo); } SDValue MipsTargetLowering:: diff --git a/test/CodeGen/Mips/2010-07-20-Switch.ll b/test/CodeGen/Mips/2010-07-20-Switch.ll index 83b8a250c2..23b5349ba8 100644 --- a/test/CodeGen/Mips/2010-07-20-Switch.ll +++ b/test/CodeGen/Mips/2010-07-20-Switch.ll @@ -1,13 +1,21 @@ -; RUN: llc < %s -march=mips -relocation-model=static | FileCheck %s +; RUN: llc < %s -march=mips -relocation-model=static | FileCheck %s -check-prefix=STATIC-O32 +; RUN: llc < %s -march=mips -relocation-model=pic | FileCheck %s -check-prefix=PIC-O32 +; RUN: llc < %s -march=mips64 -relocation-model=pic -mcpu=mips64 -mattr=n64 | FileCheck %s -check-prefix=PIC-N64 define i32 @main() nounwind readnone { entry: %x = alloca i32, align 4 ; <i32*> [#uses=2] store volatile i32 2, i32* %x, align 4 %0 = load volatile i32* %x, align 4 ; <i32> [#uses=1] -; CHECK: lui $3, %hi($JTI0_0) -; CHECK: addiu $3, $3, %lo($JTI0_0) -; CHECK: sll $2, $2, 2 +; STATIC-O32: lui $[[R0:[0-9]+]], %hi($JTI0_0) +; STATIC-O32: addiu ${{[0-9]+}}, $[[R0]], %lo($JTI0_0) +; STATIC-O32: sll ${{[0-9]+}}, ${{[0-9]+}}, 2 +; PIC-O32: lw $[[R0:[0-9]+]], %got($JTI0_0) +; PIC-O32: addiu ${{[0-9]+}}, $[[R0]], %lo($JTI0_0) +; PIC-O32: sll ${{[0-9]+}}, ${{[0-9]+}}, 2 +; PIC-N64: ld $[[R0:[0-9]+]], %got_page($JTI0_0) +; PIC-N64: daddiu ${{[0-9]+}}, $[[R0]], %got_ofst($JTI0_0) +; PIC-N64: dsll ${{[0-9]+}}, ${{[0-9]+}}, 2 switch i32 %0, label %bb4 [ i32 0, label %bb5 i32 1, label %bb1 @@ -18,7 +26,7 @@ entry: bb1: ; preds = %entry ret i32 2 -; CHECK: $BB0_2 +; CHECK: STATIC-O32: $BB0_2 bb2: ; preds = %entry ret i32 0 |