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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2013-09-03 21:05:48 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2013-09-03 21:05:48 +0000 |
commit | 330943afb7ac076ff6b347a0151dd54ec90d54e2 (patch) | |
tree | 5072fee95c55000201aa48ea0dee1fdcabba2af3 | |
parent | aa31d35dc7e47360f7f2b6c4af47b3024bf7e4da (diff) | |
download | llvm-330943afb7ac076ff6b347a0151dd54ec90d54e2.tar.gz llvm-330943afb7ac076ff6b347a0151dd54ec90d54e2.tar.bz2 llvm-330943afb7ac076ff6b347a0151dd54ec90d54e2.tar.xz |
Teach InstCombineLoadCast about address spaces.
This is another one that doesn't matter much,
but uses the right GEP index types in the first
place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189854 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp | 4 | ||||
-rw-r--r-- | test/Transforms/InstCombine/align-addr.ll | 23 |
2 files changed, 24 insertions, 3 deletions
diff --git a/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp b/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp index 4c382a366d..88e16e9725 100644 --- a/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp +++ b/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp @@ -304,8 +304,8 @@ static Instruction *InstCombineLoadCast(InstCombiner &IC, LoadInst &LI, if (Constant *CSrc = dyn_cast<Constant>(CastOp)) if (ASrcTy->getNumElements() != 0) { Type *IdxTy = TD - ? TD->getIntPtrType(LI.getContext()) - : Type::getInt64Ty(LI.getContext()); + ? TD->getIntPtrType(SrcTy) + : Type::getInt64Ty(SrcTy->getContext()); Value *Idx = Constant::getNullValue(IdxTy); Value *Idxs[2] = { Idx, Idx }; CastOp = ConstantExpr::getGetElementPtr(CSrc, Idxs); diff --git a/test/Transforms/InstCombine/align-addr.ll b/test/Transforms/InstCombine/align-addr.ll index e33ee9f5a0..4d22c2cd2e 100644 --- a/test/Transforms/InstCombine/align-addr.ll +++ b/test/Transforms/InstCombine/align-addr.ll @@ -1,5 +1,5 @@ ; RUN: opt < %s -instcombine -S | FileCheck %s -target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" +target datalayout = "E-p:64:64:64-p1:32:32:32-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" ; Instcombine should be able to prove vector alignment in the ; presence of a few mild address computation tricks. @@ -47,6 +47,27 @@ entry: ret <16 x i8> %tmp } +@GLOBAL_as1 = internal addrspace(1) global [4 x i32] zeroinitializer + +define <16 x i8> @test1_as1(<2 x i64> %x) { +; CHECK-LABEL: @test1_as1( +; CHECK: tmp = load +; CHECK: GLOBAL_as1{{.*}}align 16 + %tmp = load <16 x i8> addrspace(1)* bitcast ([4 x i32] addrspace(1)* @GLOBAL_as1 to <16 x i8> addrspace(1)*), align 1 + ret <16 x i8> %tmp +} + +@GLOBAL_as1_gep = internal addrspace(1) global [8 x i32] zeroinitializer + +define <16 x i8> @test1_as1_gep(<2 x i64> %x) { +; CHECK-LABEL: @test1_as1_gep( +; CHECK: tmp = load +; CHECK: GLOBAL_as1_gep{{.*}}align 16 + %tmp = load <16 x i8> addrspace(1)* bitcast (i32 addrspace(1)* getelementptr ([8 x i32] addrspace(1)* @GLOBAL_as1_gep, i16 0, i16 4) to <16 x i8> addrspace(1)*), align 1 + ret <16 x i8> %tmp +} + + ; When a load or store lacks an explicit alignment, add one. ; CHECK-LABEL: @test2( |