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| author | Evan Cheng <evan.cheng@apple.com> | 2009-08-04 23:47:55 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-08-04 23:47:55 +0000 |
| commit | 35d6c41fde95422fb8483be0ac0af2b1425a4b13 (patch) | |
| tree | b3dda01da047d6b0f2466bab08a6ff0f6a5cb860 | |
| parent | 9eb5c93d34b7de9bd4387481c5048d3b13085712 (diff) | |
| download | llvm-35d6c41fde95422fb8483be0ac0af2b1425a4b13.tar.gz llvm-35d6c41fde95422fb8483be0ac0af2b1425a4b13.tar.bz2 llvm-35d6c41fde95422fb8483be0ac0af2b1425a4b13.tar.xz | |
Fix part 1 of pr4682. PICADD is a 16-bit instruction even in thumb2 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78126 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrFormats.td | 4 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb.td | 7 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb2.td | 6 | ||||
| -rw-r--r-- | test/CodeGen/Thumb2/load-global.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/Thumb2/pic-load.ll | 2 |
5 files changed, 10 insertions, 11 deletions
diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td index ce39a3f737..2d76a3615f 100644 --- a/lib/Target/ARM/ARMInstrFormats.td +++ b/lib/Target/ARM/ARMInstrFormats.td @@ -808,6 +808,10 @@ class ThumbI<dag oops, dag iops, AddrMode am, SizeFlagVal sz, class TI<dag oops, dag iops, string asm, list<dag> pattern> : ThumbI<oops, iops, AddrModeNone, Size2Bytes, asm, "", pattern>; +// Two-address instructions +class TIt<dag oops, dag iops, string asm, list<dag> pattern> + : ThumbI<oops, iops, AddrModeNone, Size2Bytes, asm, "$lhs = $dst", pattern>; + // tBL, tBX instructions class TIx2<dag oops, dag iops, string asm, list<dag> pattern> : ThumbI<oops, iops, AddrModeNone, Size4Bytes, asm, "", pattern>; diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td index 9917e016dd..cc4f20c682 100644 --- a/lib/Target/ARM/ARMInstrThumb.td +++ b/lib/Target/ARM/ARMInstrThumb.td @@ -127,10 +127,11 @@ PseudoInst<(outs), (ins i32imm:$amt), [(ARMcallseq_start imm:$amt)]>, Requires<[IsThumb1Only]>; } +// For both thumb1 and thumb2. let isNotDuplicable = 1 in -def tPICADD : T1It<(outs tGPR:$dst), (ins tGPR:$lhs, pclabel:$cp), - "$cp:\n\tadd $dst, pc", - [(set tGPR:$dst, (ARMpic_add tGPR:$lhs, imm:$cp))]>; +def tPICADD : TIt<(outs GPR:$dst), (ins GPR:$lhs, pclabel:$cp), + "$cp:\n\tadd $dst, pc", + [(set GPR:$dst, (ARMpic_add GPR:$lhs, imm:$cp))]>; // PC relative add. def tADDrPCi : T1I<(outs tGPR:$dst), (ins i32imm:$rhs), diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index faa7dd5475..1b6b575a9a 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -422,12 +422,6 @@ multiclass T2I_bin_rrot<string opc, PatFrag opnode> { // Miscellaneous Instructions. // -let isNotDuplicable = 1 in -def t2PICADD : T2XI<(outs GPR:$dst), (ins GPR:$lhs, pclabel:$cp), - "$cp:\n\tadd.w $dst, $lhs, pc", - [(set GPR:$dst, (ARMpic_add GPR:$lhs, imm:$cp))]>; - - // LEApcrel - Load a pc-relative address into a register without offending the // assembler. def t2LEApcrel : T2XI<(outs GPR:$dst), (ins i32imm:$label, pred:$p), diff --git a/test/CodeGen/Thumb2/load-global.ll b/test/CodeGen/Thumb2/load-global.ll index 24aaf21f49..4aad567fa8 100644 --- a/test/CodeGen/Thumb2/load-global.ll +++ b/test/CodeGen/Thumb2/load-global.ll @@ -17,7 +17,7 @@ define i32 @test1() { ; DYNAMIC: .long L_G$non_lazy_ptr ; PIC: _test1 -; PIC: add.w r0, r0, pc +; PIC: add r0, pc ; PIC: .long L_G$non_lazy_ptr-(LPC0+4) ; LINUX: test1 diff --git a/test/CodeGen/Thumb2/pic-load.ll b/test/CodeGen/Thumb2/pic-load.ll index 553377b48b..92862c87e7 100644 --- a/test/CodeGen/Thumb2/pic-load.ll +++ b/test/CodeGen/Thumb2/pic-load.ll @@ -8,7 +8,7 @@ define hidden arm_apcscc i32 @atexit(void ()* %func) nounwind { entry: ; CHECK: atexit: -; CHECK: add.w r0, r0, pc +; CHECK: add r0, pc %r = alloca %struct.one_atexit_routine, align 4 ; <%struct.one_atexit_routine*> [#uses=3] %0 = getelementptr %struct.one_atexit_routine* %r, i32 0, i32 0, i32 0 ; <void ()**> [#uses=1] store void ()* %func, void ()** %0, align 4 |