diff options
| author | Bob Wilson <bob.wilson@apple.com> | 2010-10-29 22:03:02 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-10-29 22:03:02 +0000 |
| commit | 46455096bea2b6c81bb4b0226701524d2a9eb242 (patch) | |
| tree | 91d8f5ad7e42956e19187dcf192927c612462e28 | |
| parent | 4cac5facc3a95a81ffa2c85baae001a7c509146c (diff) | |
| download | llvm-46455096bea2b6c81bb4b0226701524d2a9eb242.tar.gz llvm-46455096bea2b6c81bb4b0226701524d2a9eb242.tar.bz2 llvm-46455096bea2b6c81bb4b0226701524d2a9eb242.tar.xz | |
Remove DAG combiner patch to fold vector splats. Instcombiner does it now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117720 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 5 | ||||
| -rw-r--r-- | test/CodeGen/ARM/vmla.ll | 16 |
2 files changed, 0 insertions, 21 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index d09ae2d20e..602d5bfcaf 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -6362,11 +6362,6 @@ SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) { V = ConvInput.getNode(); } - // Fold a splat of a splat. - ShuffleVectorSDNode *SVV = dyn_cast<ShuffleVectorSDNode>(V); - if (SVV && SVV->isSplat()) - return N0; - if (V->getOpcode() == ISD::BUILD_VECTOR) { assert(V->getNumOperands() == NumElts && "BUILD_VECTOR has wrong number of operands"); diff --git a/test/CodeGen/ARM/vmla.ll b/test/CodeGen/ARM/vmla.ll index 1f76d7377f..9c6b210be7 100644 --- a/test/CodeGen/ARM/vmla.ll +++ b/test/CodeGen/ARM/vmla.ll @@ -213,19 +213,3 @@ entry: %4 = add <2 x i64> %arg0_uint64x2_t, %3 ret <2 x i64> %4 } - -; Redundant vector splats should be removed. Radar 8597790. -define void @fold_splat(<4 x i32>* %a, <4 x i32>* %b, <4 x i32>* %c) nounwind { -; CHECK: fold_splat -; CHECK-NOT: vdup -; CHECK: vmla.i32 - %tmp1 = load <4 x i32>* %a, align 16 - %tmp3 = load <4 x i32>* %b, align 16 - %tmp5 = load <4 x i32>* %c, align 16 - %tmp6 = shufflevector <4 x i32> %tmp5, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> - %tmp7 = shufflevector <4 x i32> %tmp6, <4 x i32> undef, <4 x i32> zeroinitializer - %tmp8 = mul <4 x i32> %tmp3, %tmp7 - %tmp9 = add <4 x i32> %tmp1, %tmp8 - store <4 x i32> %tmp9, <4 x i32>* %a, align 16 - ret void -} |