Simplify some uses of utohexstr.

As a side effect hex is printed lowercase instead of uppercase now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144013 91177308-0d34-0410-b5e6-96231b3b80d8

11 files changed, 56 insertions, 58 deletions

diff --git a/lib/MC/MCDwarf.cpp b/lib/MC/MCDwarf.cpp
index 4658a3093f..49828080e0 100644
--- a/lib/MC/MCDwarf.cpp
+++ b/lib/MC/MCDwarf.cpp
@@ -21,7 +21,6 @@
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/ADT/FoldingSet.h"
 #include "llvm/ADT/SmallString.h"
-#include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/Twine.h"
 using namespace llvm;
 
@@ -738,8 +737,8 @@ bool FrameEmitterImpl::EmitCompactUnwind(MCStreamer &Streamer,
 
   // Compact Encoding
   Size = getSizeForEncoding(Streamer, dwarf::DW_EH_PE_udata4);
-  if (VerboseAsm) Streamer.AddComment(Twine("Compact Unwind Encoding: 0x") +
-                                      Twine(llvm::utohexstr(Encoding)));
+  if (VerboseAsm) Streamer.AddComment("Compact Unwind Encoding: 0x" +
+                                      Twine::utohexstr(Encoding));
   Streamer.EmitIntValue(Encoding, Size);
 
 
diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
index 844e3ab177..6c6c02146f 100644
--- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
+++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
@@ -18,7 +18,6 @@
 #include "llvm/MC/MCInst.h"
 #include "llvm/MC/MCAsmInfo.h"
 #include "llvm/MC/MCExpr.h"
-#include "llvm/ADT/StringExtras.h"
 #include "llvm/Support/raw_ostream.h"
 using namespace llvm;
 
@@ -967,7 +966,8 @@ void ARMInstPrinter::printNEONModImmOperand(const MCInst *MI, unsigned OpNum,
   unsigned EncodedImm = MI->getOperand(OpNum).getImm();
   unsigned EltBits;
   uint64_t Val = ARM_AM::decodeNEONModImm(EncodedImm, EltBits);
-  O << "#0x" << utohexstr(Val);
+  O << "#0x";
+  O.write_hex(Val);
 }
 
 void ARMInstPrinter::printImmPlusOneOperand(const MCInst *MI, unsigned OpNum,
diff --git a/lib/Target/MBlaze/MBlazeAsmPrinter.cpp b/lib/Target/MBlaze/MBlazeAsmPrinter.cpp
index 97bd083fdd..ff051e331f 100644
--- a/lib/Target/MBlaze/MBlazeAsmPrinter.cpp
+++ b/lib/Target/MBlaze/MBlazeAsmPrinter.cpp
@@ -39,7 +39,6 @@
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/ADT/SmallString.h"
-#include "llvm/ADT/StringExtras.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/TargetRegistry.h"
 #include "llvm/Support/raw_ostream.h"
@@ -119,7 +118,7 @@ namespace {
 static void printHex32(unsigned int Value, raw_ostream &O) {
   O << "0x";
   for (int i = 7; i >= 0; i--)
-    O << utohexstr((Value & (0xF << (i*4))) >> (i*4));
+    O.write_hex((Value & (0xF << (i*4))) >> (i*4));
 }
 
 // Create a bitmask with all callee saved registers for CPU or Floating Point
diff --git a/test/CodeGen/ARM/reg_sequence.ll b/test/CodeGen/ARM/reg_sequence.ll
index 3a19211112..091a003ef9 100644
--- a/test/CodeGen/ARM/reg_sequence.ll
+++ b/test/CodeGen/ARM/reg_sequence.ll
@@ -272,7 +272,7 @@ define arm_aapcs_vfpcc float @t9(%0* nocapture, %3* nocapture) nounwind {
 define arm_aapcs_vfpcc i32 @t10() nounwind {
 entry:
 ; CHECK: t10:
-; CHECK: vmov.i32 q[[Q0:[0-9]+]], #0x3F000000
+; CHECK: vmov.i32 q[[Q0:[0-9]+]], #0x3f000000
 ; CHECK: vmul.f32 q8, q8, d0[0]
 ; CHECK: vadd.f32 q8, q8, q8
   %0 = shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
diff --git a/test/CodeGen/ARM/vmov.ll b/test/CodeGen/ARM/vmov.ll
index a86be32bd2..ab56e5bb29 100644
--- a/test/CodeGen/ARM/vmov.ll
+++ b/test/CodeGen/ARM/vmov.ll
@@ -56,13 +56,13 @@ define <2 x i32> @v_movi32d() nounwind {
 
 define <2 x i32> @v_movi32e() nounwind {
 ;CHECK: v_movi32e:
-;CHECK: vmov.i32 d{{.*}}, #0x20FF
+;CHECK: vmov.i32 d{{.*}}, #0x20ff
 	ret <2 x i32> < i32 8447, i32 8447 >
 }
 
 define <2 x i32> @v_movi32f() nounwind {
 ;CHECK: v_movi32f:
-;CHECK: vmov.i32 d{{.*}}, #0x20FFFF
+;CHECK: vmov.i32 d{{.*}}, #0x20ffff
 	ret <2 x i32> < i32 2162687, i32 2162687 >
 }
 
@@ -92,19 +92,19 @@ define <2 x i32> @v_mvni32d() nounwind {
 
 define <2 x i32> @v_mvni32e() nounwind {
 ;CHECK: v_mvni32e:
-;CHECK: vmvn.i32 d{{.*}}, #0x20FF
+;CHECK: vmvn.i32 d{{.*}}, #0x20ff
 	ret <2 x i32> < i32 4294958848, i32 4294958848 >
 }
 
 define <2 x i32> @v_mvni32f() nounwind {
 ;CHECK: v_mvni32f:
-;CHECK: vmvn.i32 d{{.*}}, #0x20FFFF
+;CHECK: vmvn.i32 d{{.*}}, #0x20ffff
 	ret <2 x i32> < i32 4292804608, i32 4292804608 >
 }
 
 define <1 x i64> @v_movi64() nounwind {
 ;CHECK: v_movi64:
-;CHECK: vmov.i64 d{{.*}}, #0xFF0000FF0000FFFF
+;CHECK: vmov.i64 d{{.*}}, #0xff0000ff0000ffff
 	ret <1 x i64> < i64 18374687574888349695 >
 }
 
@@ -152,19 +152,19 @@ define <4 x i32> @v_movQi32d() nounwind {
 
 define <4 x i32> @v_movQi32e() nounwind {
 ;CHECK: v_movQi32e:
-;CHECK: vmov.i32 q{{.*}}, #0x20FF
+;CHECK: vmov.i32 q{{.*}}, #0x20ff
 	ret <4 x i32> < i32 8447, i32 8447, i32 8447, i32 8447 >
 }
 
 define <4 x i32> @v_movQi32f() nounwind {
 ;CHECK: v_movQi32f:
-;CHECK: vmov.i32 q{{.*}}, #0x20FFFF
+;CHECK: vmov.i32 q{{.*}}, #0x20ffff
 	ret <4 x i32> < i32 2162687, i32 2162687, i32 2162687, i32 2162687 >
 }
 
 define <2 x i64> @v_movQi64() nounwind {
 ;CHECK: v_movQi64:
-;CHECK: vmov.i64 q{{.*}}, #0xFF0000FF0000FFFF
+;CHECK: vmov.i64 q{{.*}}, #0xff0000ff0000ffff
 	ret <2 x i64> < i64 18374687574888349695, i64 18374687574888349695 >
 }
 
@@ -182,7 +182,7 @@ entry:
 define void @vdupnneg75(%struct.int8x8_t* noalias nocapture sret %agg.result) nounwind {
 entry:
 ;CHECK: vdupnneg75:
-;CHECK: vmov.i8 d{{.*}}, #0xB5
+;CHECK: vmov.i8 d{{.*}}, #0xb5
   %0 = getelementptr inbounds %struct.int8x8_t* %agg.result, i32 0, i32 0 ; <<8 x i8>*> [#uses=1]
   store <8 x i8> <i8 -75, i8 -75, i8 -75, i8 -75, i8 -75, i8 -75, i8 -75, i8 -75>, <8 x i8>* %0, align 8
   ret void
diff --git a/test/MC/ARM/neon-bitwise-encoding.s b/test/MC/ARM/neon-bitwise-encoding.s
index bcf647c926..72d0256290 100644
--- a/test/MC/ARM/neon-bitwise-encoding.s
+++ b/test/MC/ARM/neon-bitwise-encoding.s
@@ -33,8 +33,8 @@
 
 @ CHECK: vbic	d16, d17, d16           @ encoding: [0xb0,0x01,0x51,0xf2]
 @ CHECK: vbic	q8, q8, q9              @ encoding: [0xf2,0x01,0x50,0xf2]
-@ CHECK: vbic.i32	d16, #0xFF000000 @ encoding: [0x3f,0x07,0xc7,0xf3]
-@ CHECK: vbic.i32	q8, #0xFF000000 @ encoding: [0x7f,0x07,0xc7,0xf3]
+@ CHECK: vbic.i32	d16, #0xff000000 @ encoding: [0x3f,0x07,0xc7,0xf3]
+@ CHECK: vbic.i32	q8, #0xff000000 @ encoding: [0x7f,0x07,0xc7,0xf3]
 
 	vorn	d16, d17, d16
 	vorn	q8, q8, q9
diff --git a/test/MC/ARM/neon-mov-encoding.s b/test/MC/ARM/neon-mov-encoding.s
index 2e330039ca..6f26a13c3e 100644
--- a/test/MC/ARM/neon-mov-encoding.s
+++ b/test/MC/ARM/neon-mov-encoding.s
@@ -18,9 +18,9 @@
 @ CHECK: vmov.i32	d16, #0x2000    @ encoding: [0x10,0x02,0xc2,0xf2]
 @ CHECK: vmov.i32	d16, #0x200000  @ encoding: [0x10,0x04,0xc2,0xf2]
 @ CHECK: vmov.i32	d16, #0x20000000 @ encoding: [0x10,0x06,0xc2,0xf2]
-@ CHECK: vmov.i32	d16, #0x20FF    @ encoding: [0x10,0x0c,0xc2,0xf2]
-@ CHECK: vmov.i32	d16, #0x20FFFF  @ encoding: [0x10,0x0d,0xc2,0xf2]
-@ CHECK: vmov.i64 d16, #0xFF0000FF0000FFFF @ encoding: [0x33,0x0e,0xc1,0xf3]
+@ CHECK: vmov.i32	d16, #0x20ff    @ encoding: [0x10,0x0c,0xc2,0xf2]
+@ CHECK: vmov.i32	d16, #0x20ffff  @ encoding: [0x10,0x0d,0xc2,0xf2]
+@ CHECK: vmov.i64 d16, #0xff0000ff0000ffff @ encoding: [0x33,0x0e,0xc1,0xf3]
 
 
 
@@ -42,9 +42,9 @@
 @ CHECK: vmov.i32	q8, #0x2000     @ encoding: [0x50,0x02,0xc2,0xf2]
 @ CHECK: vmov.i32	q8, #0x200000   @ encoding: [0x50,0x04,0xc2,0xf2]
 @ CHECK: vmov.i32	q8, #0x20000000 @ encoding: [0x50,0x06,0xc2,0xf2]
-@ CHECK: vmov.i32	q8, #0x20FF     @ encoding: [0x50,0x0c,0xc2,0xf2]
-@ CHECK: vmov.i32	q8, #0x20FFFF   @ encoding: [0x50,0x0d,0xc2,0xf2]
-@ CHECK: vmov.i64 q8, #0xFF0000FF0000FFFF @ encoding: [0x73,0x0e,0xc1,0xf3]
+@ CHECK: vmov.i32	q8, #0x20ff     @ encoding: [0x50,0x0c,0xc2,0xf2]
+@ CHECK: vmov.i32	q8, #0x20ffff   @ encoding: [0x50,0x0d,0xc2,0xf2]
+@ CHECK: vmov.i64 q8, #0xff0000ff0000ffff @ encoding: [0x73,0x0e,0xc1,0xf3]
 
 	vmvn.i16	d16, #0x10
 	vmvn.i16	d16, #0x1000
@@ -61,8 +61,8 @@
 @ CHECK: vmvn.i32	d16, #0x2000    @ encoding: [0x30,0x02,0xc2,0xf2]
 @ CHECK: vmvn.i32	d16, #0x200000  @ encoding: [0x30,0x04,0xc2,0xf2]
 @ CHECK: vmvn.i32	d16, #0x20000000 @ encoding: [0x30,0x06,0xc2,0xf2]
-@ CHECK: vmvn.i32	d16, #0x20FF    @ encoding: [0x30,0x0c,0xc2,0xf2]
-@ CHECK: vmvn.i32	d16, #0x20FFFF  @ encoding: [0x30,0x0d,0xc2,0xf2]
+@ CHECK: vmvn.i32	d16, #0x20ff    @ encoding: [0x30,0x0c,0xc2,0xf2]
+@ CHECK: vmvn.i32	d16, #0x20ffff  @ encoding: [0x30,0x0d,0xc2,0xf2]
 
 	vmovl.s8	q8, d16
 	vmovl.s16	q8, d16
diff --git a/test/MC/ARM/neont2-mov-encoding.s b/test/MC/ARM/neont2-mov-encoding.s
index 2d03479b8a..43df3498cb 100644
--- a/test/MC/ARM/neont2-mov-encoding.s
+++ b/test/MC/ARM/neont2-mov-encoding.s
@@ -20,9 +20,9 @@
 @ CHECK: vmov.i32	d16, #0x2000    @ encoding: [0xc2,0xef,0x10,0x02]
 @ CHECK: vmov.i32	d16, #0x200000  @ encoding: [0xc2,0xef,0x10,0x04]
 @ CHECK: vmov.i32	d16, #0x20000000 @ encoding: [0xc2,0xef,0x10,0x06]
-@ CHECK: vmov.i32	d16, #0x20FF    @ encoding: [0xc2,0xef,0x10,0x0c]
-@ CHECK: vmov.i32	d16, #0x20FFFF  @ encoding: [0xc2,0xef,0x10,0x0d]
-@ CHECK: vmov.i64 d16, #0xFF0000FF0000FFFF @ encoding: [0xc1,0xff,0x33,0x0e]
+@ CHECK: vmov.i32	d16, #0x20ff    @ encoding: [0xc2,0xef,0x10,0x0c]
+@ CHECK: vmov.i32	d16, #0x20ffff  @ encoding: [0xc2,0xef,0x10,0x0d]
+@ CHECK: vmov.i64 d16, #0xff0000ff0000ffff @ encoding: [0xc1,0xff,0x33,0x0e]
 
 
 	vmov.i8	q8, #0x8
@@ -43,9 +43,9 @@
 @ CHECK: vmov.i32	q8, #0x2000     @ encoding: [0xc2,0xef,0x50,0x02]
 @ CHECK: vmov.i32	q8, #0x200000   @ encoding: [0xc2,0xef,0x50,0x04]
 @ CHECK: vmov.i32	q8, #0x20000000 @ encoding: [0xc2,0xef,0x50,0x06]
-@ CHECK: vmov.i32	q8, #0x20FF     @ encoding: [0xc2,0xef,0x50,0x0c]
-@ CHECK: vmov.i32	q8, #0x20FFFF   @ encoding: [0xc2,0xef,0x50,0x0d]
-@ CHECK: vmov.i64 q8, #0xFF0000FF0000FFFF @ encoding: [0xc1,0xff,0x73,0x0e]
+@ CHECK: vmov.i32	q8, #0x20ff     @ encoding: [0xc2,0xef,0x50,0x0c]
+@ CHECK: vmov.i32	q8, #0x20ffff   @ encoding: [0xc2,0xef,0x50,0x0d]
+@ CHECK: vmov.i64 q8, #0xff0000ff0000ffff @ encoding: [0xc1,0xff,0x73,0x0e]
 
 
 	vmvn.i16	d16, #0x10
@@ -63,8 +63,8 @@
 @ CHECK: vmvn.i32	d16, #0x2000    @ encoding: [0xc2,0xef,0x30,0x02]
 @ CHECK: vmvn.i32	d16, #0x200000  @ encoding: [0xc2,0xef,0x30,0x04]
 @ CHECK: vmvn.i32	d16, #0x20000000 @ encoding: [0xc2,0xef,0x30,0x06]
-@ CHECK: vmvn.i32	d16, #0x20FF    @ encoding: [0xc2,0xef,0x30,0x0c]
-@ CHECK: vmvn.i32	d16, #0x20FFFF  @ encoding: [0xc2,0xef,0x30,0x0d]
+@ CHECK: vmvn.i32	d16, #0x20ff    @ encoding: [0xc2,0xef,0x30,0x0c]
+@ CHECK: vmvn.i32	d16, #0x20ffff  @ encoding: [0xc2,0xef,0x30,0x0d]
 
 
 	vmovl.s8	q8, d16
diff --git a/test/MC/Disassembler/ARM/neon-tests.txt b/test/MC/Disassembler/ARM/neon-tests.txt
index 1e03debefa..f44c2a02cf 100644
--- a/test/MC/Disassembler/ARM/neon-tests.txt
+++ b/test/MC/Disassembler/ARM/neon-tests.txt
@@ -30,7 +30,7 @@
 # CHECK:	vorr	d0, d15, d15
 0x1f 0x01 0x2f 0xf2
 
-# CHECK:	vmov.i64	q6, #0xFF00FF00FF
+# CHECK:	vmov.i64	q6, #0xff00ff00ff
 0x75 0xce 0x81 0xf2
 
 # CHECK:	vmvn.i32	d0, #0x0
@@ -69,10 +69,10 @@
 # CHECK:	vpop	{d8}
 0x02 0x8b 0xbd 0xec
 
-# CHECK:	vorr.i32	q15, #0x4F0000
+# CHECK:	vorr.i32	q15, #0x4f0000
 0x5f 0xe5 0xc4 0xf2
 
-# CHECK:	vbic.i32	q2, #0xA900
+# CHECK:	vbic.i32	q2, #0xa900
 0x79 0x43 0x82 0xf3
 
 # CHECK:	vst2.32	{d16, d18}, [r2, :64], r2
diff --git a/test/MC/Disassembler/ARM/neon.txt b/test/MC/Disassembler/ARM/neon.txt
index 1623a0ce43..73bcd3703a 100644
--- a/test/MC/Disassembler/ARM/neon.txt
+++ b/test/MC/Disassembler/ARM/neon.txt
@@ -307,9 +307,9 @@
 0xf2 0x01 0x50 0xf2
 # CHECK: vbic	q8, q8, q9
 0x3f 0x07 0xc7 0xf3
-# CHECK: vbic.i32	d16, #0xFF000000
+# CHECK: vbic.i32	d16, #0xff000000
 0x7f 0x07 0xc7 0xf3
-# CHECK: vbic.i32	q8, #0xFF000000
+# CHECK: vbic.i32	q8, #0xff000000
 
 0xb0 0x01 0x71 0xf2
 # CHECK: vorn	d16, d17, d16
@@ -587,11 +587,11 @@
 0x10 0x06 0xc2 0xf2
 # CHECK: vmov.i32	d16, #0x20000000
 0x10 0x0c 0xc2 0xf2
-# CHECK: vmov.i32	d16, #0x20FF
+# CHECK: vmov.i32	d16, #0x20ff
 0x10 0x0d 0xc2 0xf2
-# CHECK: vmov.i32	d16, #0x20FFFF
+# CHECK: vmov.i32	d16, #0x20ffff
 0x33 0x0e 0xc1 0xf3
-# CHECK: vmov.i64	d16, #0xFF0000FF0000FFFF
+# CHECK: vmov.i64	d16, #0xff0000ff0000ffff
 0x58 0x0e 0xc0 0xf2
 # CHECK: vmov.i8	q8, #0x8
 0x50 0x08 0xc1 0xf2
@@ -607,11 +607,11 @@
 0x50 0x06 0xc2 0xf2
 # CHECK: vmov.i32	q8, #0x20000000
 0x50 0x0c 0xc2 0xf2
-# CHECK: vmov.i32	q8, #0x20FF
+# CHECK: vmov.i32	q8, #0x20ff
 0x50 0x0d 0xc2 0xf2
-# CHECK: vmov.i32	q8, #0x20FFFF
+# CHECK: vmov.i32	q8, #0x20ffff
 0x73 0x0e 0xc1 0xf3
-# CHECK: vmov.i64	q8, #0xFF0000FF0000FFFF
+# CHECK: vmov.i64	q8, #0xff0000ff0000ffff
 0x30 0x08 0xc1 0xf2
 # CHECK: vmvn.i16	d16, #0x10
 0x30 0x0a 0xc1 0xf2
@@ -625,9 +625,9 @@
 0x30 0x06 0xc2 0xf2
 # CHECK: vmvn.i32	d16, #0x20000000
 0x30 0x0c 0xc2 0xf2
-# CHECK: vmvn.i32	d16, #0x20FF
+# CHECK: vmvn.i32	d16, #0x20ff
 0x30 0x0d 0xc2 0xf2
-# CHECK: vmvn.i32	d16, #0x20FFFF
+# CHECK: vmvn.i32	d16, #0x20ffff
 0x30 0x0a 0xc8 0xf2
 # CHECK: vmovl.s8	q8, d16
 0x30 0x0a 0xd0 0xf2
diff --git a/test/MC/Disassembler/ARM/neont2.txt b/test/MC/Disassembler/ARM/neont2.txt
index c456e8b861..6f01f522ad 100644
--- a/test/MC/Disassembler/ARM/neont2.txt
+++ b/test/MC/Disassembler/ARM/neont2.txt
@@ -301,9 +301,9 @@
 0x50 0xef 0xf2 0x01
 # CHECK: vbic	q8, q8, q9
 0xc7 0xff 0x3f 0x07
-# CHECK: vbic.i32	d16, #0xFF000000
+# CHECK: vbic.i32	d16, #0xff000000
 0xc7 0xff 0x7f 0x07
-# CHECK: vbic.i32	q8, #0xFF000000
+# CHECK: vbic.i32	q8, #0xff000000
 
 0x71 0xef 0xb0 0x01
 # CHECK: vorn	d16, d17, d16
@@ -486,11 +486,11 @@
 0xc2 0xef 0x10 0x06
 # CHECK: vmov.i32	d16, #0x20000000
 0xc2 0xef 0x10 0x0c
-# CHECK: vmov.i32	d16, #0x20FF
+# CHECK: vmov.i32	d16, #0x20ff
 0xc2 0xef 0x10 0x0d
-# CHECK: vmov.i32	d16, #0x20FFFF
+# CHECK: vmov.i32	d16, #0x20ffff
 0xc1 0xff 0x33 0x0e
-# CHECK: vmov.i64	d16, #0xFF0000FF0000FFFF
+# CHECK: vmov.i64	d16, #0xff0000ff0000ffff
 0xc0 0xef 0x58 0x0e
 # CHECK: vmov.i8	q8, #0x8
 0xc1 0xef 0x50 0x08
@@ -506,11 +506,11 @@
 0xc2 0xef 0x50 0x06
 # CHECK: vmov.i32	q8, #0x20000000
 0xc2 0xef 0x50 0x0c
-# CHECK: vmov.i32	q8, #0x20FF
+# CHECK: vmov.i32	q8, #0x20ff
 0xc2 0xef 0x50 0x0d
-# CHECK: vmov.i32	q8, #0x20FFFF
+# CHECK: vmov.i32	q8, #0x20ffff
 0xc1 0xff 0x73 0x0e
-# CHECK: vmov.i64	q8, #0xFF0000FF0000FFFF
+# CHECK: vmov.i64	q8, #0xff0000ff0000ffff
 0xc1 0xef 0x30 0x08
 # CHECK: vmvn.i16	d16, #0x10
 0xc1 0xef 0x30 0x0a
@@ -524,9 +524,9 @@
 0xc2 0xef 0x30 0x06
 # CHECK: vmvn.i32	d16, #0x20000000
 0xc2 0xef 0x30 0x0c
-# CHECK: vmvn.i32	d16, #0x20FF
+# CHECK: vmvn.i32	d16, #0x20ff
 0xc2 0xef 0x30 0x0d
-# CHECK: vmvn.i32	d16, #0x20FFFF
+# CHECK: vmvn.i32	d16, #0x20ffff
 0xc8 0xef 0x30 0x0a
 # CHECK: vmovl.s8	q8, d16
 0xd0 0xef 0x30 0x0a