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| author | Hal Finkel <hfinkel@anl.gov> | 2012-04-01 20:08:08 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2012-04-01 20:08:08 +0000 |
| commit | 730acfb413849f05e9735145d6634c4429467ab7 (patch) | |
| tree | 6949cec23fe31b08c7abcbed81d3efb42f39559a | |
| parent | 4ac9081c7110dbf099d682fa51c091741e763491 (diff) | |
| download | llvm-730acfb413849f05e9735145d6634c4429467ab7.tar.gz llvm-730acfb413849f05e9735145d6634c4429467ab7.tar.bz2 llvm-730acfb413849f05e9735145d6634c4429467ab7.tar.xz | |
Add LdStSTD* itin. for the PPC64 A2 core.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153850 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/PowerPC/PPCScheduleA2.td | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCScheduleA2.td b/lib/Target/PowerPC/PPCScheduleA2.td index 92b629f7fe..2c728fe464 100644 --- a/lib/Target/PowerPC/PPCScheduleA2.td +++ b/lib/Target/PowerPC/PPCScheduleA2.td @@ -350,6 +350,26 @@ def PPCA2Itineraries : ProcessorItineraries< InstrStage<1, [XEX5]>, InstrStage<1, [XEX6]>], [26, 7], [NoBypass, GPR_Bypass]>, + InstrItinData<LdStSTD , [InstrStage<4, [IU0to3_0, IU0to3_1, IU0to3_2, IU0to3_3]>, + InstrStage<1, [IU4_0, IU4_1, IU4_2, IU4_3, + IU4_4, IU4_5, IU4_6, IU4_7]>, + InstrStage<1, [IU5]>, InstrStage<1, [IU6]>, + InstrStage<1, [RF0]>, InstrStage<1, [XRF1]>, + InstrStage<1, [XEX1]>, InstrStage<1, [XEX2]>, + InstrStage<1, [XEX3]>, InstrStage<1, [XEX4]>, + InstrStage<1, [XEX5]>, InstrStage<1, [XEX6]>], + [13, 7], + [GPR_Bypass, GPR_Bypass]>, + InstrItinData<LdStSTDCX , [InstrStage<4, [IU0to3_0, IU0to3_1, IU0to3_2, IU0to3_3]>, + InstrStage<1, [IU4_0, IU4_1, IU4_2, IU4_3, + IU4_4, IU4_5, IU4_6, IU4_7]>, + InstrStage<1, [IU5]>, InstrStage<13, [IU6]>, + InstrStage<1, [RF0]>, InstrStage<1, [XRF1]>, + InstrStage<1, [XEX1]>, InstrStage<1, [XEX2]>, + InstrStage<1, [XEX3]>, InstrStage<1, [XEX4]>, + InstrStage<1, [XEX5]>, InstrStage<1, [XEX6]>], + [26, 7], + [NoBypass, GPR_Bypass]>, InstrItinData<LdStSTWCX , [InstrStage<4, [IU0to3_0, IU0to3_1, IU0to3_2, IU0to3_3]>, InstrStage<1, [IU4_0, IU4_1, IU4_2, IU4_3, IU4_4, IU4_5, IU4_6, IU4_7]>, |