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author | Eric Christopher <echristo@gmail.com> | 2014-05-05 21:50:57 +0000 |
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committer | Eric Christopher <echristo@gmail.com> | 2014-05-05 21:50:57 +0000 |
commit | 73ebb5abafee2d695ddc4555225eec436b7e25a2 (patch) | |
tree | 07a2d6d46066df72c92fb65076e7dc710dc95152 | |
parent | 4b84b524e5866a907939aae23711797153343598 (diff) | |
download | llvm-73ebb5abafee2d695ddc4555225eec436b7e25a2.tar.gz llvm-73ebb5abafee2d695ddc4555225eec436b7e25a2.tar.bz2 llvm-73ebb5abafee2d695ddc4555225eec436b7e25a2.tar.xz |
Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208006 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/ARM64/ARM64.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM64/ARM64.td b/lib/Target/ARM64/ARM64.td index 653f157415..c473205f17 100644 --- a/lib/Target/ARM64/ARM64.td +++ b/lib/Target/ARM64/ARM64.td @@ -34,7 +34,7 @@ def FeatureCRC : SubtargetFeature<"crc", "HasCRC", "true", /// Cyclone has register move instructions which are "free". def FeatureZCRegMove : SubtargetFeature<"zcm", "HasZeroCycleRegMove", "true", - "Has zereo-cycle register moves">; + "Has zero-cycle register moves">; /// Cyclone has instructions which zero registers for "free". def FeatureZCZeroing : SubtargetFeature<"zcz", "HasZeroCycleZeroing", "true", |