Add getNumVirtualRegs().

Whitespace cleanups.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11388 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 9 insertions, 5 deletions

diff --git a/include/llvm/CodeGen/SSARegMap.h b/include/llvm/CodeGen/SSARegMap.h
index c31911c91b..65c0cce732 100644
--- a/include/llvm/CodeGen/SSARegMap.h
+++ b/include/llvm/CodeGen/SSARegMap.h
@@ -1,17 +1,17 @@
 //===-- llvm/CodeGen/SSARegMap.h --------------------------------*- C++ -*-===//
-// 
+//
 //                     The LLVM Compiler Infrastructure
 //
 // This file was developed by the LLVM research group and is distributed under
 // the University of Illinois Open Source License. See LICENSE.TXT for details.
-// 
+//
 //===----------------------------------------------------------------------===//
-// 
+//
 // Map register numbers to register classes that are correctly sized (typed) to
 // hold the information. Assists register allocation. Contained by
 // MachineFunction, should be deleted by register allocator when it is no
 // longer needed.
-//   
+//
 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_CODEGEN_SSAREGMAP_H
@@ -26,7 +26,7 @@ class TargetRegisterClass;
 class SSARegMap {
   std::vector<const TargetRegisterClass*> RegClassMap;
 
-  unsigned rescale(unsigned Reg) { 
+  unsigned rescale(unsigned Reg) {
     return Reg - MRegisterInfo::FirstVirtualRegister;
   }
 
@@ -44,6 +44,10 @@ class SSARegMap {
     RegClassMap.push_back(RegClass);
     return RegClassMap.size()+MRegisterInfo::FirstVirtualRegister-1;
   }
+
+  unsigned getNumVirtualRegs() const {
+    return RegClassMap.size();
+  }
 };
 
 } // End llvm namespace