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authorDan Gohman <gohman@apple.com>2008-07-09 19:56:01 +0000
committerDan Gohman <gohman@apple.com>2008-07-09 19:56:01 +0000
commit88cef2480f1c3977c70eb549ecf83f5a2c99a7a8 (patch)
treeb28e50c40a74ef43bf9a930b8a0a3bede3c51e1d
parent88490546240c1f1e3ded46a103c2b4f53c19a008 (diff)
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Give RegAllocSimple a TargetInstrInfo member to keep it consistent
with RegAllocLocal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53347 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/CodeGen/RegAllocSimple.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp
index f07f7f92be..ce4b42071a 100644
--- a/lib/CodeGen/RegAllocSimple.cpp
+++ b/lib/CodeGen/RegAllocSimple.cpp
@@ -46,6 +46,7 @@ namespace {
MachineFunction *MF;
const TargetMachine *TM;
const TargetRegisterInfo *TRI;
+ const TargetInstrInfo *TII;
// StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where
// these values are spilled
@@ -144,7 +145,6 @@ unsigned RegAllocSimple::reloadVirtReg(MachineBasicBlock &MBB,
// Add move instruction(s)
++NumLoads;
- const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
TII->loadRegFromStackSlot(MBB, I, PhysReg, FrameIdx, RC);
return PhysReg;
}
@@ -153,7 +153,6 @@ void RegAllocSimple::spillVirtReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
unsigned VirtReg, unsigned PhysReg) {
const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(VirtReg);
- const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
int FrameIdx = getStackSpaceFor(VirtReg, RC);
@@ -240,6 +239,7 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
MF = &Fn;
TM = &MF->getTarget();
TRI = TM->getRegisterInfo();
+ TII = TM->getInstrInfo();
// Loop over all of the basic blocks, eliminating virtual register references
for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();