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authorTom Stellard <thomas.stellard@amd.com>2013-05-03 17:21:24 +0000
committerTom Stellard <thomas.stellard@amd.com>2013-05-03 17:21:24 +0000
commit8b1c60c151c56062a04cd06cfbe1d8e8efcd50ac (patch)
tree442a051d33fb75b880693fb595395a82e69b4dfc
parent83f0a5a5e8e132b3ce39f15ed2583ad344b88ec4 (diff)
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R600: BFI_INT is a vector-only instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181034 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/R600/R600Instructions.td2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/R600/R600Instructions.td b/lib/Target/R600/R600Instructions.td
index 0466c187ef..8a60add450 100644
--- a/lib/Target/R600/R600Instructions.td
+++ b/lib/Target/R600/R600Instructions.td
@@ -1616,7 +1616,7 @@ let Predicates = [isEGorCayman] in {
VecALU
>;
- def BFI_INT_eg : R600_3OP <0x06, "BFI_INT", []>;
+ def BFI_INT_eg : R600_3OP <0x06, "BFI_INT", [], VecALU>;
defm : BFIPatterns <BFI_INT_eg>;
def BIT_ALIGN_INT_eg : R600_3OP <0xC, "BIT_ALIGN_INT",