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| author | Chris Lattner <sabre@nondot.org> | 2009-04-12 07:51:14 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2009-04-12 07:51:14 +0000 |
| commit | 8d57b778b5f57295ac9aac2e1ad1434d9ac2bcc4 (patch) | |
| tree | 0fd9112c463b5be873bd8a70250ae01fc8358910 | |
| parent | 36e3946ac2f30a0bda66538ef2b974b1c8fbdc97 (diff) | |
| download | llvm-8d57b778b5f57295ac9aac2e1ad1434d9ac2bcc4.tar.gz llvm-8d57b778b5f57295ac9aac2e1ad1434d9ac2bcc4.tar.bz2 llvm-8d57b778b5f57295ac9aac2e1ad1434d9ac2bcc4.tar.xz | |
fix a cross-block fastisel crash handling overflow intrinsics.
See comment for details. This fixes rdar://6772169
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68890 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86FastISel.cpp | 21 | ||||
| -rw-r--r-- | test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll | 21 |
2 files changed, 37 insertions, 5 deletions
diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp index c2932ff79e..2cfa719d73 100644 --- a/lib/Target/X86/X86FastISel.cpp +++ b/lib/Target/X86/X86FastISel.cpp @@ -809,8 +809,8 @@ bool X86FastISel::X86SelectBranch(Instruction *I) { unsigned OpCode = SetMI->getOpcode(); if (OpCode == X86::SETOr || OpCode == X86::SETBr) { - BuildMI(MBB, DL, TII.get((OpCode == X86::SETOr) ? - X86::JO : X86::JB)).addMBB(TrueMBB); + BuildMI(MBB, DL, TII.get(OpCode == X86::SETOr ? X86::JO : X86::JB)) + .addMBB(TrueMBB); FastEmitBranch(FalseMBB); MBB->addSuccessor(TrueMBB); return true; @@ -1072,9 +1072,20 @@ bool X86FastISel::X86VisitIntrinsicCall(IntrinsicInst &I) { unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT)); BuildMI(MBB, DL, TII.get(OpC), ResultReg).addReg(Reg1).addReg(Reg2); - UpdateValueMap(&I, ResultReg); - - ResultReg = createResultReg(TLI.getRegClassFor(MVT::i8)); + unsigned DestReg1 = UpdateValueMap(&I, ResultReg); + + // If the add with overflow is an intra-block value then we just want to + // create temporaries for it like normal. If it is a cross-block value then + // UpdateValueMap will return the cross-block register used. Since we + // *really* want the value to be live in the register pair known by + // UpdateValueMap, we have to use DestReg1+1 as the destination register in + // the cross block case. In the non-cross-block case, we should just make + // another register for the value. + if (DestReg1 != ResultReg) + ResultReg = DestReg1+1; + else + ResultReg = createResultReg(TLI.getRegClassFor(MVT::i8)); + unsigned Opc = X86::SETBr; if (I.getIntrinsicID() == Intrinsic::sadd_with_overflow) Opc = X86::SETOr; diff --git a/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll b/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll new file mode 100644 index 0000000000..bf1c8df377 --- /dev/null +++ b/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll @@ -0,0 +1,21 @@ +; RUN: llvm-as < %s | llc -fast-isel +; radr://6772169 +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-apple-darwin10" + type { i32, i1 } ; type %0 + +declare %0 @llvm.sadd.with.overflow.i32(i32, i32) nounwind + +define fastcc i32 @test() nounwind { +entry: + %tmp1 = call %0 @llvm.sadd.with.overflow.i32(i32 1, i32 0) + %tmp2 = extractvalue %0 %tmp1, 1 + br i1 %tmp2, label %.backedge, label %BB3 + +BB3: + %tmp4 = extractvalue %0 %tmp1, 0 + br label %.backedge + +.backedge: + ret i32 0 +} |