diff options
| author | Bill Wendling <isanbard@gmail.com> | 2007-07-04 00:19:54 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2007-07-04 00:19:54 +0000 |
| commit | 93888428d422f3d007012a4ca8a52fb20b219a50 (patch) | |
| tree | be21f603b6ba91670a98a0da14b6fe2875310309 | |
| parent | 5653322e729fd2016556fd1d5e54cde20d3012d8 (diff) | |
| download | llvm-93888428d422f3d007012a4ca8a52fb20b219a50.tar.gz llvm-93888428d422f3d007012a4ca8a52fb20b219a50.tar.bz2 llvm-93888428d422f3d007012a4ca8a52fb20b219a50.tar.xz | |
Allow a GR64 to be moved into an MMX register via the "movd" instruction.
Still need to have JIT generate this code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37863 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrMMX.td | 13 | ||||
| -rw-r--r-- | test/CodeGen/X86/2007-06-15-IntToMMX.ll | 1 | ||||
| -rw-r--r-- | test/CodeGen/X86/2007-07-03-GR64ToVR64.ll | 20 |
3 files changed, 33 insertions, 1 deletions
diff --git a/lib/Target/X86/X86InstrMMX.td b/lib/Target/X86/X86InstrMMX.td index 897d8f2aab..e3cfa0059f 100644 --- a/lib/Target/X86/X86InstrMMX.td +++ b/lib/Target/X86/X86InstrMMX.td @@ -183,6 +183,9 @@ def MMX_MOVD64rm : MMXI<0x6E, MRMSrcMem, (ops VR64:$dst, i32mem:$src), def MMX_MOVD64mr : MMXI<0x7E, MRMDestMem, (ops i32mem:$dst, VR64:$src), "movd {$src, $dst|$dst, $src}", []>; +def MMX_MOVD64to64rr : MMXI<0x6E, MRMSrcReg, (ops VR64:$dst, GR64:$src), + "movd {$src, $dst|$dst, $src}", []>; + def MMX_MOVQ64rr : MMXI<0x6F, MRMSrcReg, (ops VR64:$dst, VR64:$src), "movq {$src, $dst|$dst, $src}", []>; def MMX_MOVQ64rm : MMXI<0x6F, MRMSrcMem, (ops VR64:$dst, i64mem:$src), @@ -552,6 +555,16 @@ def : Pat<(v1i64 (bitconvert (v2i32 VR64:$src))), (v1i64 VR64:$src)>; def : Pat<(v1i64 (bitconvert (v4i16 VR64:$src))), (v1i64 VR64:$src)>; def : Pat<(v1i64 (bitconvert (v8i8 VR64:$src))), (v1i64 VR64:$src)>; +// 64-bit bit convert. +def : Pat<(v1i64 (bitconvert (i64 GR64:$src))), + (MMX_MOVD64to64rr GR64:$src)>; +def : Pat<(v2i32 (bitconvert (i64 GR64:$src))), + (MMX_MOVD64to64rr GR64:$src)>; +def : Pat<(v4i16 (bitconvert (i64 GR64:$src))), + (MMX_MOVD64to64rr GR64:$src)>; +def : Pat<(v8i8 (bitconvert (i64 GR64:$src))), + (MMX_MOVD64to64rr GR64:$src)>; + def MMX_X86s2vec : SDNode<"X86ISD::S2VEC", SDTypeProfile<1, 1, []>, []>; // Move scalar to XMM zero-extended diff --git a/test/CodeGen/X86/2007-06-15-IntToMMX.ll b/test/CodeGen/X86/2007-06-15-IntToMMX.ll index a72de1cd98..e608ac3ecb 100644 --- a/test/CodeGen/X86/2007-06-15-IntToMMX.ll +++ b/test/CodeGen/X86/2007-06-15-IntToMMX.ll @@ -1,5 +1,4 @@ ; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep paddusw -; XFAIL: * @R = external global <1 x i64> ; <<1 x i64>*> [#uses=1] define void @foo(<1 x i64> %A, <1 x i64> %B) { diff --git a/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll b/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll new file mode 100644 index 0000000000..b2b1a9472c --- /dev/null +++ b/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll @@ -0,0 +1,20 @@ +; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep {movd %rsi, %mm0} && +; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep {movd %rdi, %mm1} && +; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep {paddusw %mm0, %mm1} + +@R = external global <1 x i64> ; <<1 x i64>*> [#uses=1] + +define void @foo(<1 x i64> %A, <1 x i64> %B) { +entry: + %tmp4 = bitcast <1 x i64> %B to <4 x i16> ; <<4 x i16>> [#uses=1] + %tmp6 = bitcast <1 x i64> %A to <4 x i16> ; <<4 x i16>> [#uses=1] + %tmp7 = tail call <4 x i16> @llvm.x86.mmx.paddus.w( <4 x i16> %tmp6, <4 x i16> %tmp4 ) ; <<4 x i16>> [#uses=1] + %tmp8 = bitcast <4 x i16> %tmp7 to <1 x i64> ; <<1 x i64>> [#uses=1] + store <1 x i64> %tmp8, <1 x i64>* @R + tail call void @llvm.x86.mmx.emms( ) + ret void +} + +declare <4 x i16> @llvm.x86.mmx.paddus.w(<4 x i16>, <4 x i16>) + +declare void @llvm.x86.mmx.emms() |