diff options
author | Misha Brukman <brukman+llvm@gmail.com> | 2009-01-07 23:07:29 +0000 |
---|---|---|
committer | Misha Brukman <brukman+llvm@gmail.com> | 2009-01-07 23:07:29 +0000 |
commit | 93c65c83784f1ed3e5f3d87b02d5aaccbcd02926 (patch) | |
tree | 0ccdf57c06ed2ee9f3b5e00cd0c0e451efb22242 | |
parent | fdede435b9795beb9308558040265e53424e919b (diff) | |
download | llvm-93c65c83784f1ed3e5f3d87b02d5aaccbcd02926.tar.gz llvm-93c65c83784f1ed3e5f3d87b02d5aaccbcd02926.tar.bz2 llvm-93c65c83784f1ed3e5f3d87b02d5aaccbcd02926.tar.xz |
Fix off-by-one error in traversing an array; this fixes a test.
The error was reported by gcc-4.3.0 during compilation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61896 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/CellSPU/SPUInstrInfo.cpp | 2 | ||||
-rw-r--r-- | test/CodeGen/CellSPU/shift_ops.ll | 2 |
2 files changed, 1 insertions, 3 deletions
diff --git a/lib/Target/CellSPU/SPUInstrInfo.cpp b/lib/Target/CellSPU/SPUInstrInfo.cpp index 06ad50762f..fa6e33b075 100644 --- a/lib/Target/CellSPU/SPUInstrInfo.cpp +++ b/lib/Target/CellSPU/SPUInstrInfo.cpp @@ -678,7 +678,7 @@ SPUInstrInfo::ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) unsigned Opc = unsigned(Cond[0].getImm()); // Pretty dull mapping between the two conditions that SPU can generate: - for (int i = sizeof(revconds)/sizeof(revconds[0]); i >= 0; --i) { + for (int i = sizeof(revconds)/sizeof(revconds[0]) - 1; i >= 0; --i) { if (revconds[i].Opc == Opc) { Cond[0].setImm(revconds[i].RevCondOpc); return false; diff --git a/test/CodeGen/CellSPU/shift_ops.ll b/test/CodeGen/CellSPU/shift_ops.ll index 928e4904b4..5b60dc178f 100644 --- a/test/CodeGen/CellSPU/shift_ops.ll +++ b/test/CodeGen/CellSPU/shift_ops.ll @@ -16,8 +16,6 @@ ; RUN: grep -w rotqbybi %t1.s | count 1 ; RUN: grep -w sfi %t1.s | count 3 -; XFAIL: alpha|linux|sparc|ia64|arm - target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" target triple = "spu" |