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authorBenjamin Kramer <benny.kra@googlemail.com>2012-06-06 19:47:08 +0000
committerBenjamin Kramer <benny.kra@googlemail.com>2012-06-06 19:47:08 +0000
commit95a9d937728ca9cf2bf44f86ff1184df318b3bd7 (patch)
tree77b5cf196dfbbd2ec36581c239d67d5632540710
parenta7542d5f870c5d98960d1676e23ac1d1d975d7e5 (diff)
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Round 2 of dead private variable removal.
LLVM is now -Wunused-private-field clean except for - lib/MC/MCDisassembler/Disassembler.h. Not sure why it keeps all those unaccessible fields. - gtest. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158096 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--include/llvm/Analysis/ProfileInfoLoader.h4
-rw-r--r--lib/Analysis/ProfileInfoLoader.cpp6
-rw-r--r--lib/Analysis/ProfileInfoLoaderPass.cpp2
-rw-r--r--lib/CodeGen/InlineSpiller.cpp4
-rw-r--r--lib/CodeGen/RegAllocGreedy.cpp1
-rw-r--r--lib/ExecutionEngine/MCJIT/MCJIT.cpp2
-rw-r--r--lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h10
-rw-r--r--lib/Target/CellSPU/SPUHazardRecognizers.cpp6
-rw-r--r--lib/Target/CellSPU/SPUHazardRecognizers.h6
-rw-r--r--lib/Target/CellSPU/SPUISelLowering.h1
-rw-r--r--lib/Target/NVPTX/NVPTXRegisterInfo.cpp8
-rw-r--r--lib/Target/NVPTX/NVPTXRegisterInfo.h2
-rw-r--r--lib/Target/Sparc/SparcFrameLowering.h5
-rw-r--r--lib/Target/XCore/XCoreFrameLowering.cpp3
-rw-r--r--lib/Target/XCore/XCoreFrameLowering.h1
-rw-r--r--tools/llvm-prof/llvm-prof.cpp2
-rw-r--r--unittests/Support/TypeBuilderTest.cpp4
-rw-r--r--utils/TableGen/DAGISelEmitter.h3
18 files changed, 19 insertions, 51 deletions
diff --git a/include/llvm/Analysis/ProfileInfoLoader.h b/include/llvm/Analysis/ProfileInfoLoader.h
index 9e0c393c42..4539757b78 100644
--- a/include/llvm/Analysis/ProfileInfoLoader.h
+++ b/include/llvm/Analysis/ProfileInfoLoader.h
@@ -28,7 +28,6 @@ class BasicBlock;
class ProfileInfoLoader {
const std::string &Filename;
- Module &M;
std::vector<std::string> CommandLines;
std::vector<unsigned> FunctionCounts;
std::vector<unsigned> BlockCounts;
@@ -39,8 +38,7 @@ class ProfileInfoLoader {
public:
// ProfileInfoLoader ctor - Read the specified profiling data file, exiting
// the program if the file is invalid or broken.
- ProfileInfoLoader(const char *ToolName, const std::string &Filename,
- Module &M);
+ ProfileInfoLoader(const char *ToolName, const std::string &Filename);
static const unsigned Uncounted;
diff --git a/lib/Analysis/ProfileInfoLoader.cpp b/lib/Analysis/ProfileInfoLoader.cpp
index eaa38dad16..027116e7ed 100644
--- a/lib/Analysis/ProfileInfoLoader.cpp
+++ b/lib/Analysis/ProfileInfoLoader.cpp
@@ -83,10 +83,8 @@ const unsigned ProfileInfoLoader::Uncounted = ~0U;
// program if the file is invalid or broken.
//
ProfileInfoLoader::ProfileInfoLoader(const char *ToolName,
- const std::string &Filename,
- Module &TheModule) :
- Filename(Filename),
- M(TheModule), Warned(false) {
+ const std::string &Filename)
+ : Filename(Filename), Warned(false) {
FILE *F = fopen(Filename.c_str(), "rb");
if (F == 0) {
errs() << ToolName << ": Error opening '" << Filename << "': ";
diff --git a/lib/Analysis/ProfileInfoLoaderPass.cpp b/lib/Analysis/ProfileInfoLoaderPass.cpp
index c4da8079a5..5ecf052a1a 100644
--- a/lib/Analysis/ProfileInfoLoaderPass.cpp
+++ b/lib/Analysis/ProfileInfoLoaderPass.cpp
@@ -152,7 +152,7 @@ void LoaderPass::readEdge(ProfileInfo::Edge e,
}
bool LoaderPass::runOnModule(Module &M) {
- ProfileInfoLoader PIL("profile-loader", Filename, M);
+ ProfileInfoLoader PIL("profile-loader", Filename);
EdgeInformation.clear();
std::vector<unsigned> Counters = PIL.getRawEdgeCounts();
diff --git a/lib/CodeGen/InlineSpiller.cpp b/lib/CodeGen/InlineSpiller.cpp
index c1d9d2757a..9833097c8d 100644
--- a/lib/CodeGen/InlineSpiller.cpp
+++ b/lib/CodeGen/InlineSpiller.cpp
@@ -52,7 +52,6 @@ static cl::opt<bool> DisableHoisting("disable-spill-hoist", cl::Hidden,
namespace {
class InlineSpiller : public Spiller {
- MachineFunctionPass &Pass;
MachineFunction &MF;
LiveIntervals &LIS;
LiveStacks &LSS;
@@ -137,8 +136,7 @@ public:
InlineSpiller(MachineFunctionPass &pass,
MachineFunction &mf,
VirtRegMap &vrm)
- : Pass(pass),
- MF(mf),
+ : MF(mf),
LIS(pass.getAnalysis<LiveIntervals>()),
LSS(pass.getAnalysis<LiveStacks>()),
AA(&pass.getAnalysis<AliasAnalysis>()),
diff --git a/lib/CodeGen/RegAllocGreedy.cpp b/lib/CodeGen/RegAllocGreedy.cpp
index bb00603f4d..f4f1bf2bf0 100644
--- a/lib/CodeGen/RegAllocGreedy.cpp
+++ b/lib/CodeGen/RegAllocGreedy.cpp
@@ -73,7 +73,6 @@ class RAGreedy : public MachineFunctionPass,
// analyses
SlotIndexes *Indexes;
- LiveStacks *LS;
MachineDominatorTree *DomTree;
MachineLoopInfo *Loops;
EdgeBundles *Bundles;
diff --git a/lib/ExecutionEngine/MCJIT/MCJIT.cpp b/lib/ExecutionEngine/MCJIT/MCJIT.cpp
index 7d2fabb3f1..84274c071c 100644
--- a/lib/ExecutionEngine/MCJIT/MCJIT.cpp
+++ b/lib/ExecutionEngine/MCJIT/MCJIT.cpp
@@ -45,7 +45,7 @@ ExecutionEngine *MCJIT::createJIT(Module *M,
// If the target supports JIT code generation, create the JIT.
if (TargetJITInfo *TJ = TM->getJITInfo())
- return new MCJIT(M, TM, *TJ, new MCJITMemoryManager(JMM, M), GVsWithCode);
+ return new MCJIT(M, TM, *TJ, new MCJITMemoryManager(JMM), GVsWithCode);
if (ErrorStr)
*ErrorStr = "target does not support JIT code generation";
diff --git a/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h b/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h
index 084f9a8ead..441aaeb5ec 100644
--- a/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h
+++ b/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h
@@ -22,15 +22,11 @@ namespace llvm {
// matching LLVM IR counterparts in the module(s) being compiled.
class MCJITMemoryManager : public RTDyldMemoryManager {
virtual void anchor();
- JITMemoryManager *JMM;
+ OwningPtr<JITMemoryManager> JMM;
- // FIXME: Multiple modules.
- Module *M;
public:
- MCJITMemoryManager(JITMemoryManager *jmm, Module *m) :
- JMM(jmm?jmm:JITMemoryManager::CreateDefaultMemManager()), M(m) {}
- // We own the JMM, so make sure to delete it.
- ~MCJITMemoryManager() { delete JMM; }
+ MCJITMemoryManager(JITMemoryManager *jmm) :
+ JMM(jmm?jmm:JITMemoryManager::CreateDefaultMemManager()) {}
uint8_t *allocateDataSection(uintptr_t Size, unsigned Alignment,
unsigned SectionID) {
diff --git a/lib/Target/CellSPU/SPUHazardRecognizers.cpp b/lib/Target/CellSPU/SPUHazardRecognizers.cpp
index 403d7ef1fd..67a83f16a6 100644
--- a/lib/Target/CellSPU/SPUHazardRecognizers.cpp
+++ b/lib/Target/CellSPU/SPUHazardRecognizers.cpp
@@ -30,12 +30,6 @@ using namespace llvm;
// very little right now.
//===----------------------------------------------------------------------===//
-SPUHazardRecognizer::SPUHazardRecognizer(const TargetInstrInfo &tii) :
- TII(tii),
- EvenOdd(0)
-{
-}
-
/// Return the pipeline hazard type encountered or generated by this
/// instruction. Currently returns NoHazard.
///
diff --git a/lib/Target/CellSPU/SPUHazardRecognizers.h b/lib/Target/CellSPU/SPUHazardRecognizers.h
index 675632cc7f..30acaeaa36 100644
--- a/lib/Target/CellSPU/SPUHazardRecognizers.h
+++ b/lib/Target/CellSPU/SPUHazardRecognizers.h
@@ -24,12 +24,8 @@ class TargetInstrInfo;
/// SPUHazardRecognizer
class SPUHazardRecognizer : public ScheduleHazardRecognizer
{
-private:
- const TargetInstrInfo &TII;
- int EvenOdd;
-
public:
- SPUHazardRecognizer(const TargetInstrInfo &TII);
+ SPUHazardRecognizer(const TargetInstrInfo &/*TII*/) {}
virtual HazardType getHazardType(SUnit *SU, int Stalls);
virtual void EmitInstruction(SUnit *SU);
virtual void AdvanceCycle();
diff --git a/lib/Target/CellSPU/SPUISelLowering.h b/lib/Target/CellSPU/SPUISelLowering.h
index e7d0976ca5..9f1599fa6f 100644
--- a/lib/Target/CellSPU/SPUISelLowering.h
+++ b/lib/Target/CellSPU/SPUISelLowering.h
@@ -86,7 +86,6 @@ namespace llvm {
class SPUTargetLowering :
public TargetLowering
{
- int VarArgsFrameIndex; // FrameIndex for start of varargs area.
SPUTargetMachine &SPUTM;
public:
diff --git a/lib/Target/NVPTX/NVPTXRegisterInfo.cpp b/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
index 99b40a86f4..e3cd46f063 100644
--- a/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
+++ b/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
@@ -250,12 +250,8 @@ int getNVPTXVectorSize(TargetRegisterClass const *RC) {
NVPTXRegisterInfo::NVPTXRegisterInfo(const TargetInstrInfo &tii,
const NVPTXSubtarget &st)
-: NVPTXGenRegisterInfo(0),
- TII(tii),
- ST(st) {
- Is64Bit = st.is64Bit();
-}
-
+ : NVPTXGenRegisterInfo(0),
+ Is64Bit(st.is64Bit()) {}
#define GET_REGINFO_TARGET_DESC
#include "NVPTXGenRegisterInfo.inc"
diff --git a/lib/Target/NVPTX/NVPTXRegisterInfo.h b/lib/Target/NVPTX/NVPTXRegisterInfo.h
index e8b587ce16..595178335a 100644
--- a/lib/Target/NVPTX/NVPTXRegisterInfo.h
+++ b/lib/Target/NVPTX/NVPTXRegisterInfo.h
@@ -31,8 +31,6 @@ class NVPTXSubtarget;
class NVPTXRegisterInfo : public NVPTXGenRegisterInfo {
private:
- const TargetInstrInfo &TII;
- const NVPTXSubtarget &ST;
bool Is64Bit;
// Hold Strings that can be free'd all together with NVPTXRegisterInfo
ManagedStringPool ManagedStrPool;
diff --git a/lib/Target/Sparc/SparcFrameLowering.h b/lib/Target/Sparc/SparcFrameLowering.h
index 210705e2d4..6b593c95bb 100644
--- a/lib/Target/Sparc/SparcFrameLowering.h
+++ b/lib/Target/Sparc/SparcFrameLowering.h
@@ -22,10 +22,9 @@ namespace llvm {
class SparcSubtarget;
class SparcFrameLowering : public TargetFrameLowering {
- const SparcSubtarget &STI;
public:
- explicit SparcFrameLowering(const SparcSubtarget &sti)
- : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 8, 0), STI(sti) {
+ explicit SparcFrameLowering(const SparcSubtarget &/*sti*/)
+ : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 8, 0) {
}
/// emitProlog/emitEpilog - These methods insert prolog and epilog code into
diff --git a/lib/Target/XCore/XCoreFrameLowering.cpp b/lib/Target/XCore/XCoreFrameLowering.cpp
index 1e82abf381..3dbc3b9ee5 100644
--- a/lib/Target/XCore/XCoreFrameLowering.cpp
+++ b/lib/Target/XCore/XCoreFrameLowering.cpp
@@ -78,8 +78,7 @@ static void storeToStack(MachineBasicBlock &MBB,
//===----------------------------------------------------------------------===//
XCoreFrameLowering::XCoreFrameLowering(const XCoreSubtarget &sti)
- : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 4, 0),
- STI(sti) {
+ : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 4, 0) {
// Do nothing
}
diff --git a/lib/Target/XCore/XCoreFrameLowering.h b/lib/Target/XCore/XCoreFrameLowering.h
index 4c51aa5e79..afa2773180 100644
--- a/lib/Target/XCore/XCoreFrameLowering.h
+++ b/lib/Target/XCore/XCoreFrameLowering.h
@@ -22,7 +22,6 @@ namespace llvm {
class XCoreSubtarget;
class XCoreFrameLowering: public TargetFrameLowering {
- const XCoreSubtarget &STI;
public:
XCoreFrameLowering(const XCoreSubtarget &STI);
diff --git a/tools/llvm-prof/llvm-prof.cpp b/tools/llvm-prof/llvm-prof.cpp
index d9b6713364..81e9503abe 100644
--- a/tools/llvm-prof/llvm-prof.cpp
+++ b/tools/llvm-prof/llvm-prof.cpp
@@ -281,7 +281,7 @@ int main(int argc, char **argv) {
// using the standard profile info provider pass, but for now this gives us
// access to additional information not exposed via the ProfileInfo
// interface.
- ProfileInfoLoader PIL(argv[0], ProfileDataFile, *M);
+ ProfileInfoLoader PIL(argv[0], ProfileDataFile);
// Run the printer pass.
PassManager PassMgr;
diff --git a/unittests/Support/TypeBuilderTest.cpp b/unittests/Support/TypeBuilderTest.cpp
index 20d0e73914..1d3225726e 100644
--- a/unittests/Support/TypeBuilderTest.cpp
+++ b/unittests/Support/TypeBuilderTest.cpp
@@ -167,13 +167,13 @@ TEST(TypeBuilderTest, Context) {
&(TypeBuilder<types::i<1>, true>::get(context2))->getContext());
}
-class MyType {
+struct MyType {
int a;
int *b;
void *array[1];
};
-class MyPortableType {
+struct MyPortableType {
int32_t a;
int32_t *b;
void *array[1];
diff --git a/utils/TableGen/DAGISelEmitter.h b/utils/TableGen/DAGISelEmitter.h
index 9c9fe4273f..5204bb135d 100644
--- a/utils/TableGen/DAGISelEmitter.h
+++ b/utils/TableGen/DAGISelEmitter.h
@@ -23,10 +23,9 @@ namespace llvm {
/// and emission of the instruction selector.
///
class DAGISelEmitter : public TableGenBackend {
- RecordKeeper &Records;
CodeGenDAGPatterns CGP;
public:
- explicit DAGISelEmitter(RecordKeeper &R) : Records(R), CGP(R) {}
+ explicit DAGISelEmitter(RecordKeeper &R) : CGP(R) {}
// run - Output the isel, returning true on failure.
void run(raw_ostream &OS);