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| author | Bill Wendling <isanbard@gmail.com> | 2013-11-26 10:46:15 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2013-11-26 10:46:15 +0000 |
| commit | 9ed81d16f71b60c246a7b8e9ed4fdd58a48ce4b9 (patch) | |
| tree | 91c9441f2fe1f5445800c27781ad81dd48738f2e | |
| parent | d1b770d24dea3dc93a7c0f75cf61e3400cde73b0 (diff) | |
| download | llvm-9ed81d16f71b60c246a7b8e9ed4fdd58a48ce4b9.tar.gz llvm-9ed81d16f71b60c246a7b8e9ed4fdd58a48ce4b9.tar.bz2 llvm-9ed81d16f71b60c246a7b8e9ed4fdd58a48ce4b9.tar.xz | |
Merging r195679:
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r195679 | rafael | 2013-11-25 12:15:14 -0800 (Mon, 25 Nov 2013) | 12 lines
Don't use nopl in cpus that don't support it.
Patch by Mikulas Patocka. I added the test. I checked that for cpu names that
gas knows about, it also doesn't generate nopl.
The modified cpus:
i686 - there are i686-class CPUs that don't have nopl: Via c3, Transmeta
Crusoe, Microsoft VirtualBox - see
https://bbs.archlinux.org/viewtopic.php?pid=775414
k6, k6-2, k6-3, winchip-c6, winchip2 - these are 586-class CPUs
via c3 c3-2 - see https://bugs.archlinux.org/task/19733 as a proof that
Via c3 and c3-Nehemiah don't have nopl
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195730 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 6 | ||||
| -rw-r--r-- | test/MC/X86/x86_nop.s | 27 |
2 files changed, 30 insertions, 3 deletions
diff --git a/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp index c1a710be5c..1c6f07121d 100644 --- a/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp +++ b/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp @@ -309,8 +309,12 @@ bool X86AsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const { // This CPU doesnt support long nops. If needed add more. // FIXME: Can we get this from the subtarget somehow? + // FIXME: We could generated something better than plain 0x90. if (CPU == "generic" || CPU == "i386" || CPU == "i486" || CPU == "i586" || - CPU == "pentium" || CPU == "pentium-mmx" || CPU == "geode") { + CPU == "pentium" || CPU == "pentium-mmx" || CPU == "i686" || + CPU == "k6" || CPU == "k6-2" || CPU == "k6-3" || CPU == "geode" || + CPU == "winchip-c6" || CPU == "winchip2" || CPU == "c3" || + CPU == "c3-2") { for (uint64_t i = 0; i < Count; ++i) OW->Write8(0x90); return true; diff --git a/test/MC/X86/x86_nop.s b/test/MC/X86/x86_nop.s index 396e3022eb..e8eed6a7d2 100644 --- a/test/MC/X86/x86_nop.s +++ b/test/MC/X86/x86_nop.s @@ -5,9 +5,32 @@ # RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=pentium %s | llvm-objdump -d - | FileCheck %s # RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=pentium-mmx %s | llvm-objdump -d - | FileCheck %s # RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=geode %s | llvm-objdump -d - | FileCheck %s -# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=i686 %s | llvm-objdump -d - | not FileCheck %s +# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=i686 %s | llvm-objdump -d - | FileCheck %s +# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=k6 %s | llvm-objdump -d - | FileCheck %s +# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=k6-2 %s | llvm-objdump -d - | FileCheck %s +# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=k6-3 %s | llvm-objdump -d - | FileCheck %s +# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=winchip-c6 %s | llvm-objdump -d - | FileCheck %s +# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=winchip2 %s | llvm-objdump -d - | FileCheck %s +# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=c3 %s | llvm-objdump -d - | FileCheck %s +# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=c3-2 %s | llvm-objdump -d - | FileCheck %s +# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=core2 %s | llvm-objdump -d - | FileCheck --check-prefix=NOPL %s + -# CHECK-NOT: nop{{[lw]}} inc %eax .align 8 inc %eax + +// CHECK: 0: 40 incl %eax +// CHECK: 1: 90 nop +// CHECK: 2: 90 nop +// CHECK: 3: 90 nop +// CHECK: 4: 90 nop +// CHECK: 5: 90 nop +// CHECK: 6: 90 nop +// CHECK: 7: 90 nop +// CHECK: 8: 40 incl %eax + + +// NOPL: 0: 40 incl %eax +// NOPL: 1: 0f 1f 80 00 00 00 00 nopl (%eax) +// NOPL: 8: 40 incl %eax |