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author | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2013-06-03 14:42:40 +0000 |
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committer | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2013-06-03 14:42:40 +0000 |
commit | b8ce45752b0b2f149d43a51f6a5a849140f378fe (patch) | |
tree | a0cb2f8abb22964e4ccaf1814d2d545dc04ff7c0 | |
parent | 625b109916a6c8eaf77dd56cdce74aaea08ee731 (diff) | |
download | llvm-b8ce45752b0b2f149d43a51f6a5a849140f378fe.tar.gz llvm-b8ce45752b0b2f149d43a51f6a5a849140f378fe.tar.bz2 llvm-b8ce45752b0b2f149d43a51f6a5a849140f378fe.tar.xz |
X86: sub_xmm registers are 128 bits wide.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183103 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/X86/X86RegisterInfo.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/X86/X86RegisterInfo.td b/lib/Target/X86/X86RegisterInfo.td index edf22ee112..fbbb2575f6 100644 --- a/lib/Target/X86/X86RegisterInfo.td +++ b/lib/Target/X86/X86RegisterInfo.td @@ -25,7 +25,7 @@ let Namespace = "X86" in { def sub_8bit_hi : SubRegIndex<8, 8>; def sub_16bit : SubRegIndex<16>; def sub_32bit : SubRegIndex<32>; - def sub_xmm : SubRegIndex<64>; + def sub_xmm : SubRegIndex<128>; } //===----------------------------------------------------------------------===// |