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| author | NAKAMURA Takumi <geek4civic@gmail.com> | 2013-09-02 12:00:46 +0000 |
|---|---|---|
| committer | NAKAMURA Takumi <geek4civic@gmail.com> | 2013-09-02 12:00:46 +0000 |
| commit | b9edd20706d4c74111e6c7a65819641926132efa (patch) | |
| tree | 6453e367afbd3ae92d4c9cee22e16351e61599b7 | |
| parent | b775f2f39c428d6a8a06e81c51b0b7cf51330f50 (diff) | |
| download | llvm-b9edd20706d4c74111e6c7a65819641926132efa.tar.gz llvm-b9edd20706d4c74111e6c7a65819641926132efa.tar.bz2 llvm-b9edd20706d4c74111e6c7a65819641926132efa.tar.xz | |
llvm/test/CodeGen/X86: Update tests with -mattr=-bmi not to take BMI, corresponding to Craig's r189742.
AMD Piledriver builder detected failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189754 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | test/CodeGen/X86/h-register-addressing-32.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/X86/h-register-addressing-64.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/X86/h-registers-0.ll | 6 | ||||
| -rw-r--r-- | test/CodeGen/X86/h-registers-1.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/X86/ins_subreg_coalesce-1.ll | 2 |
5 files changed, 7 insertions, 7 deletions
diff --git a/test/CodeGen/X86/h-register-addressing-32.ll b/test/CodeGen/X86/h-register-addressing-32.ll index 968a9e88c0..3cf2db3697 100644 --- a/test/CodeGen/X86/h-register-addressing-32.ll +++ b/test/CodeGen/X86/h-register-addressing-32.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep "movzbl %[abcd]h," | count 7 +; RUN: llc < %s -march=x86 -mattr=-bmi | grep "movzbl %[abcd]h," | count 7 ; Use h-register extract and zero-extend. diff --git a/test/CodeGen/X86/h-register-addressing-64.ll b/test/CodeGen/X86/h-register-addressing-64.ll index a19fca5558..07cdc5df59 100644 --- a/test/CodeGen/X86/h-register-addressing-64.ll +++ b/test/CodeGen/X86/h-register-addressing-64.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep "movzbl %[abcd]h," | count 7 +; RUN: llc < %s -march=x86-64 -mattr=-bmi | grep "movzbl %[abcd]h," | count 7 ; Use h-register extract and zero-extend. diff --git a/test/CodeGen/X86/h-registers-0.ll b/test/CodeGen/X86/h-registers-0.ll index 71b3b43c9a..6a5ccaa1e7 100644 --- a/test/CodeGen/X86/h-registers-0.ll +++ b/test/CodeGen/X86/h-registers-0.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X86-64 -; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64 -; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X86-32 +; RUN: llc < %s -mattr=-bmi -mtriple=x86_64-linux | FileCheck %s -check-prefix=X86-64 +; RUN: llc < %s -mattr=-bmi -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64 +; RUN: llc < %s -mattr=-bmi -march=x86 | FileCheck %s -check-prefix=X86-32 ; Use h registers. On x86-64, codegen doesn't support general allocation ; of h registers yet, due to x86 encoding complications. diff --git a/test/CodeGen/X86/h-registers-1.ll b/test/CodeGen/X86/h-registers-1.ll index 903c4538ab..9d38172fa9 100644 --- a/test/CodeGen/X86/h-registers-1.ll +++ b/test/CodeGen/X86/h-registers-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=x86_64-linux > %t +; RUN: llc -mattr=-bmi < %s -mtriple=x86_64-linux > %t ; RUN: grep "movzbl %[abcd]h," %t | count 8 ; RUN: grep "%[abcd]h" %t | not grep "%r[[:digit:]]*d" diff --git a/test/CodeGen/X86/ins_subreg_coalesce-1.ll b/test/CodeGen/X86/ins_subreg_coalesce-1.ll index bec98a26f1..a74e3f20c4 100644 --- a/test/CodeGen/X86/ins_subreg_coalesce-1.ll +++ b/test/CodeGen/X86/ins_subreg_coalesce-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=-bmi | FileCheck %s define fastcc i32 @t() nounwind { entry: |