diff options
author | Lang Hames <lhames@gmail.com> | 2012-04-02 19:58:43 +0000 |
---|---|---|
committer | Lang Hames <lhames@gmail.com> | 2012-04-02 19:58:43 +0000 |
commit | be9fe49b179a89a659fe786d64b176d2b360bb4a (patch) | |
tree | b3570318e953c06b4e63fb2dc2fb5e52aa80e9ae | |
parent | ce167840b2408e531fb7616627ff1bf769b4a111 (diff) | |
download | llvm-be9fe49b179a89a659fe786d64b176d2b360bb4a.tar.gz llvm-be9fe49b179a89a659fe786d64b176d2b360bb4a.tar.bz2 llvm-be9fe49b179a89a659fe786d64b176d2b360bb4a.tar.xz |
During two-address lowering, rescheduling an instruction does not untie
operands. Make TryInstructionTransform return false to reflect this.
Fixes PR11861.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153892 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/CodeGen/TwoAddressInstructionPass.cpp | 4 | ||||
-rw-r--r-- | test/CodeGen/ARM/2012-04-02-TwoAddrInstrCrash.ll | 24 |
2 files changed, 26 insertions, 2 deletions
diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp index 24b8bc2048..789617ba7f 100644 --- a/lib/CodeGen/TwoAddressInstructionPass.cpp +++ b/lib/CodeGen/TwoAddressInstructionPass.cpp @@ -1248,7 +1248,7 @@ TryInstructionTransform(MachineBasicBlock::iterator &mi, // re-schedule this MI below it. if (RescheduleMIBelowKill(mbbi, mi, nmi, regB)) { ++NumReSchedDowns; - return true; + return false; } if (TargetRegisterInfo::isVirtualRegister(regA)) @@ -1270,7 +1270,7 @@ TryInstructionTransform(MachineBasicBlock::iterator &mi, // re-schedule it before this MI if it's legal. if (RescheduleKillAboveMI(mbbi, mi, nmi, regB)) { ++NumReSchedUps; - return true; + return false; } // If this is an instruction with a load folded into it, try unfolding diff --git a/test/CodeGen/ARM/2012-04-02-TwoAddrInstrCrash.ll b/test/CodeGen/ARM/2012-04-02-TwoAddrInstrCrash.ll new file mode 100644 index 0000000000..33ad187926 --- /dev/null +++ b/test/CodeGen/ARM/2012-04-02-TwoAddrInstrCrash.ll @@ -0,0 +1,24 @@ +; RUN: llc < %s +; PR11861 +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64" +target triple = "armv7-none-linux-gnueabi" + +define arm_aapcs_vfpcc void @foo() nounwind align 2 { + br i1 undef, label %5, label %1 + +; <label>:1 ; preds = %0 + %2 = shufflevector <1 x i64> zeroinitializer, <1 x i64> undef, <2 x i32> <i32 0, i32 1> + %3 = bitcast <2 x i64> %2 to <4 x float> + store <4 x float> zeroinitializer, <4 x float>* undef, align 16, !tbaa !0 + store <4 x float> zeroinitializer, <4 x float>* undef, align 16, !tbaa !0 + store <4 x float> %3, <4 x float>* undef, align 16, !tbaa !0 + %4 = insertelement <4 x float> %3, float 8.000000e+00, i32 2 + store <4 x float> %4, <4 x float>* undef, align 16, !tbaa !0 + unreachable + +; <label>:5 ; preds = %0 + ret void +} + +!0 = metadata !{metadata !"omnipotent char", metadata !1} +!1 = metadata !{metadata !"Simple C/C++ TBAA", null} |