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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-02-24 00:39:35 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-02-24 00:39:35 +0000 |
| commit | c3027f769a7a7479f3c24537d9d525edd83e90b1 (patch) | |
| tree | f16ab91ef7c2f1cc2c9aaa81e5a5b5fef0e784aa | |
| parent | cec479de4e2452baa68a71fae7e5a15ed36815ac (diff) | |
| download | llvm-c3027f769a7a7479f3c24537d9d525edd83e90b1.tar.gz llvm-c3027f769a7a7479f3c24537d9d525edd83e90b1.tar.bz2 llvm-c3027f769a7a7479f3c24537d9d525edd83e90b1.tar.xz | |
DIV8r must define %AX since X86DAGToDAGISel::Select() sometimes uses it
instead of %AL/%AH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97006 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 2 | ||||
| -rw-r--r-- | test/CodeGen/X86/2010-02-23-DIV8rDefinesAX.ll | 20 |
2 files changed, 21 insertions, 1 deletions
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index a6fd81f862..d4ce223249 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -1156,7 +1156,7 @@ def IMUL32m : I<0xF7, MRM5m, (outs), (ins i32mem:$src), } // neverHasSideEffects // unsigned division/remainder -let Defs = [AL,AH,EFLAGS], Uses = [AX] in +let Defs = [AX,EFLAGS], Uses = [AX] in def DIV8r : I<0xF6, MRM6r, (outs), (ins GR8:$src), // AX/r8 = AL,AH "div{b}\t$src", []>; let Defs = [AX,DX,EFLAGS], Uses = [AX,DX] in diff --git a/test/CodeGen/X86/2010-02-23-DIV8rDefinesAX.ll b/test/CodeGen/X86/2010-02-23-DIV8rDefinesAX.ll new file mode 100644 index 0000000000..8543c80117 --- /dev/null +++ b/test/CodeGen/X86/2010-02-23-DIV8rDefinesAX.ll @@ -0,0 +1,20 @@ +; RUN: llc < %s +; PR6374 +; +; This test produces a DIV8r instruction and uses %AX instead of %AH and %AL. +; The DIV8r must have the right imp-defs for that to work. +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +%struct._i386_state = type { %union.anon } +%union.anon = type { [0 x i8] } + +define void @i386_aam(%struct._i386_state* nocapture %cpustate) nounwind ssp { +entry: + %call = tail call fastcc signext i8 @FETCH() ; <i8> [#uses=1] + %rem = urem i8 0, %call ; <i8> [#uses=1] + store i8 %rem, i8* undef + ret void +} + +declare fastcc signext i8 @FETCH() nounwind readnone ssp |