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| author | Reid Spencer <rspencer@reidspencer.com> | 2007-03-26 05:32:16 +0000 |
|---|---|---|
| committer | Reid Spencer <rspencer@reidspencer.com> | 2007-03-26 05:32:16 +0000 |
| commit | c3a53f2720c6baf7fbc214a54e062ed517b732c3 (patch) | |
| tree | 9b864499704fc7fc6b61e5ff2e52260c61f76706 | |
| parent | 1be1284fe658f4b8078eb5f8b5b0074e60d972cd (diff) | |
| download | llvm-c3a53f2720c6baf7fbc214a54e062ed517b732c3.tar.gz llvm-c3a53f2720c6baf7fbc214a54e062ed517b732c3.tar.bz2 llvm-c3a53f2720c6baf7fbc214a54e062ed517b732c3.tar.xz | |
Test case for PR1271 involving construction of a bad mask to replace a
shift instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35349 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | test/Transforms/InstCombine/2007-03-25-BadShiftMask.ll | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/test/Transforms/InstCombine/2007-03-25-BadShiftMask.ll b/test/Transforms/InstCombine/2007-03-25-BadShiftMask.ll new file mode 100644 index 0000000000..3a706a5686 --- /dev/null +++ b/test/Transforms/InstCombine/2007-03-25-BadShiftMask.ll @@ -0,0 +1,28 @@ +; PR1271 +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep 'br i1 %1' +%struct..0anon = type { i32, i32 } +%struct..1anon = type { double } + +define i32 @main() { +entry: + %u = alloca %struct..1anon, align 8 ; <%struct..1anon*> [#uses=4] + %tmp1 = getelementptr %struct..1anon* %u, i32 0, i32 0 ; <double*> [#uses=1] + store double 0x7FF0000000000000, double* %tmp1 + %tmp3 = getelementptr %struct..1anon* %u, i32 0, i32 0 ; <double*> [#uses=1] + %tmp34 = bitcast double* %tmp3 to %struct..0anon* ; <%struct..0anon*> [#uses=1] + %tmp5 = getelementptr %struct..0anon* %tmp34, i32 0, i32 1 ; <i32*> [#uses=1] + %tmp6 = load i32* %tmp5 ; <i32> [#uses=1] + %tmp7 = shl i32 %tmp6, 1 ; <i32> [#uses=1] + %tmp8 = lshr i32 %tmp7, 21 ; <i32> [#uses=1] + %tmp89 = trunc i32 %tmp8 to i16 ; <i16> [#uses=1] + icmp ne i16 %tmp89, 2047 ; <i1>:0 [#uses=1] + zext i1 %0 to i8 ; <i8>:1 [#uses=1] + icmp ne i8 %1, 0 ; <i1>:2 [#uses=1] + br i1 %2, label %cond_true, label %cond_false + +cond_true: ; preds = %entry + ret i32 0 + +cond_false: ; preds = %entry + ret i32 1 +} |