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author | Evan Cheng <evan.cheng@apple.com> | 2011-11-16 18:44:48 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2011-11-16 18:44:48 +0000 |
commit | c3aa7c5c5aa1e06aa8a728149c6696401bd08faa (patch) | |
tree | 45420443c6f07ddeccaeb268ecdabf37db6c2ae7 | |
parent | 508a1f4db16baea5c0d5b1c4797d005dff1ee30f (diff) | |
download | llvm-c3aa7c5c5aa1e06aa8a728149c6696401bd08faa.tar.gz llvm-c3aa7c5c5aa1e06aa8a728149c6696401bd08faa.tar.bz2 llvm-c3aa7c5c5aa1e06aa8a728149c6696401bd08faa.tar.xz |
Disable expensive two-address optimizations at -O0. rdar://10453055
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144806 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/CodeGen/TwoAddressInstructionPass.cpp | 8 | ||||
-rw-r--r-- | test/CodeGen/X86/fast-isel-gep.ll | 5 | ||||
-rw-r--r-- | test/CodeGen/X86/fast-isel-x86-64.ll | 4 |
3 files changed, 12 insertions, 5 deletions
diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp index 7a0fcb5651..a2e81344d4 100644 --- a/lib/CodeGen/TwoAddressInstructionPass.cpp +++ b/lib/CodeGen/TwoAddressInstructionPass.cpp @@ -68,6 +68,7 @@ namespace { MachineRegisterInfo *MRI; LiveVariables *LV; AliasAnalysis *AA; + CodeGenOpt::Level OptLevel; // DistanceMap - Keep track the distance of a MI from the start of the // current basic block. @@ -571,6 +572,9 @@ bool TwoAddressInstructionPass::isProfitableToCommute(unsigned regB, unsigned regC, MachineInstr *MI, MachineBasicBlock *MBB, unsigned Dist) { + if (OptLevel == CodeGenOpt::None) + return false; + // Determine if it's profitable to commute this two address instruction. In // general, we want no uses between this instruction and the definition of // the two-address register. @@ -1193,6 +1197,9 @@ TryInstructionTransform(MachineBasicBlock::iterator &mi, MachineFunction::iterator &mbbi, unsigned SrcIdx, unsigned DstIdx, unsigned Dist, SmallPtrSet<MachineInstr*, 8> &Processed) { + if (OptLevel == CodeGenOpt::None) + return false; + MachineInstr &MI = *mi; const MCInstrDesc &MCID = MI.getDesc(); unsigned regA = MI.getOperand(DstIdx).getReg(); @@ -1388,6 +1395,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) { InstrItins = TM.getInstrItineraryData(); LV = getAnalysisIfAvailable<LiveVariables>(); AA = &getAnalysis<AliasAnalysis>(); + OptLevel = TM.getOptLevel(); bool MadeChange = false; diff --git a/test/CodeGen/X86/fast-isel-gep.ll b/test/CodeGen/X86/fast-isel-gep.ll index 91d1f5d151..f0375f8602 100644 --- a/test/CodeGen/X86/fast-isel-gep.ll +++ b/test/CodeGen/X86/fast-isel-gep.ll @@ -82,9 +82,8 @@ define i64 @test5(i8* %A, i32 %I, i64 %B) nounwind { ret i64 %v11 ; X64: test5: ; X64: movslq %e[[A1]], %rax -; X64-NEXT: movq (%r[[A0]],%rax), %rax -; X64-NEXT: addq %{{rdx|r8}}, %rax -; X64-NEXT: ret +; X64-NEXT: (%r[[A0]],%rax), +; X64: ret } ; PR9500, rdar://9156159 - Don't do non-local address mode folding, diff --git a/test/CodeGen/X86/fast-isel-x86-64.ll b/test/CodeGen/X86/fast-isel-x86-64.ll index 6a5a10295f..377fd11625 100644 --- a/test/CodeGen/X86/fast-isel-x86-64.ll +++ b/test/CodeGen/X86/fast-isel-x86-64.ll @@ -82,7 +82,7 @@ entry: ret i64 %mul ; CHECK: test6: -; CHECK: leaq (,%rdi,8), %rax +; CHECK: shlq $3, %rdi } define i32 @test7(i32 %x) nounwind ssp { @@ -90,7 +90,7 @@ entry: %mul = mul nsw i32 %x, 8 ret i32 %mul ; CHECK: test7: -; CHECK: leal (,%rdi,8), %eax +; CHECK: shll $3, %edi } |