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authorDan Gohman <gohman@apple.com>2010-07-15 15:14:45 +0000
committerDan Gohman <gohman@apple.com>2010-07-15 15:14:45 +0000
commitc88c1a4581a4c73657892ef4ed72f1c9f72ed7ff (patch)
tree887ae061a0048d1f29fcc5e53396e618ade89abb
parent96fe621e078837a150b321003f1dd07dd2b830ba (diff)
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Watch out for a constant offset cancelling out a base register, forming
a zero. This situation arrises in Fortran code with induction variables that start at 1 instead of 0. This fixes PR7651. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108424 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Transforms/Scalar/LoopStrengthReduce.cpp11
-rw-r--r--test/CodeGen/X86/lsr-i386.ll44
2 files changed, 53 insertions, 2 deletions
diff --git a/lib/Transforms/Scalar/LoopStrengthReduce.cpp b/lib/Transforms/Scalar/LoopStrengthReduce.cpp
index a250a88c99..1f9b4156b9 100644
--- a/lib/Transforms/Scalar/LoopStrengthReduce.cpp
+++ b/lib/Transforms/Scalar/LoopStrengthReduce.cpp
@@ -2362,7 +2362,7 @@ void LSRInstance::GenerateConstantOffsets(LSRUse &LU, unsigned LUIdx,
Formula Base) {
// TODO: For now, just add the min and max offset, because it usually isn't
// worthwhile looking at everything inbetween.
- SmallVector<int64_t, 4> Worklist;
+ SmallVector<int64_t, 2> Worklist;
Worklist.push_back(LU.MinOffset);
if (LU.MaxOffset != LU.MinOffset)
Worklist.push_back(LU.MaxOffset);
@@ -2376,7 +2376,14 @@ void LSRInstance::GenerateConstantOffsets(LSRUse &LU, unsigned LUIdx,
F.AM.BaseOffs = (uint64_t)Base.AM.BaseOffs - *I;
if (isLegalUse(F.AM, LU.MinOffset - *I, LU.MaxOffset - *I,
LU.Kind, LU.AccessTy, TLI)) {
- F.BaseRegs[i] = SE.getAddExpr(G, SE.getConstant(G->getType(), *I));
+ // Add the offset to the base register.
+ const SCEV *NewG = SE.getAddExpr(G, SE.getConstant(G->getType(), *I));
+ // If it cancelled out, drop the base register, otherwise update it.
+ if (NewG->isZero()) {
+ std::swap(F.BaseRegs[i], F.BaseRegs.back());
+ F.BaseRegs.pop_back();
+ } else
+ F.BaseRegs[i] = NewG;
(void)InsertFormula(LU, LUIdx, F);
}
diff --git a/test/CodeGen/X86/lsr-i386.ll b/test/CodeGen/X86/lsr-i386.ll
new file mode 100644
index 0000000000..02baf2072e
--- /dev/null
+++ b/test/CodeGen/X86/lsr-i386.ll
@@ -0,0 +1,44 @@
+; RUN: llc -march=x86 < %s | FileCheck %s
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
+target triple = "i386-pc-linux-gnu"
+; PR7651
+
+; CHECK: align
+; CHECK: align
+; CHECK: align
+; CHECK: movl $0, (%e
+; CHECK-NEXT: addl $4, %e
+; CHECK-NEXT: decl %e
+; CHECK-NEXT: jne
+
+%struct.anon = type { [72 x i32], i32 }
+
+@mp2grad_ = external global %struct.anon
+
+define void @chomp2g_setup_(i32 %n, i32 %m) nounwind {
+entry:
+ br label %bb1
+
+bb1: ; preds = %bb6, %bb
+ %indvar11 = phi i32 [ %indvar.next12, %bb6 ], [ 0, %entry ] ; <i32> [#uses=2]
+ %tmp21 = add i32 %indvar11, 1 ; <i32> [#uses=1]
+ %t = load i32* getelementptr inbounds (%struct.anon* @mp2grad_, i32 0, i32 1)
+ %tmp15 = mul i32 %n, %t ; <i32> [#uses=1]
+ %tmp16 = add i32 %tmp21, %tmp15 ; <i32> [#uses=1]
+ %tmp17 = shl i32 %tmp16, 3 ; <i32> [#uses=1]
+ %tmp18 = add i32 %tmp17, -8 ; <i32> [#uses=1]
+ br label %bb2
+
+bb2: ; preds = %bb2, %bb2.preheader
+ %indvar = phi i32 [ 0, %bb1 ], [ %indvar.next, %bb2 ] ; <i32> [#uses=2]
+ %tmp19 = add i32 %tmp18, %indvar ; <i32> [#uses=1]
+ %scevgep = getelementptr %struct.anon* @mp2grad_, i32 0, i32 0, i32 %tmp19 ; <i32*> [#uses=1]
+ store i32 0, i32* %scevgep
+ %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
+ %c = icmp ne i32 %indvar.next, %m
+ br i1 %c, label %bb2, label %bb6
+
+bb6: ; preds = %bb2, %bb1
+ %indvar.next12 = add i32 %indvar11, 1 ; <i32> [#uses=1]
+ br label %bb1
+}