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authorBob Wilson <bob.wilson@apple.com>2011-04-19 18:11:52 +0000
committerBob Wilson <bob.wilson@apple.com>2011-04-19 18:11:52 +0000
commitcd70496ad1e69656a0b3d2caada4ed1b2c543d7a (patch)
tree9ccae6f1ca2c5cb73eb8adc4adb5774e52cf7652
parent5dde893c2bac9e1569c38429f756c1d723e8edf2 (diff)
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Add -mcpu=cortex-a9-mp. It's cortex-a9 with MP extension. rdar://8648637.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129774 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARM.td2
-rw-r--r--test/CodeGen/ARM/prefetch.ll21
2 files changed, 15 insertions, 8 deletions
diff --git a/lib/Target/ARM/ARM.td b/lib/Target/ARM/ARM.td
index 133af31a38..745d31dcd0 100644
--- a/lib/Target/ARM/ARM.td
+++ b/lib/Target/ARM/ARM.td
@@ -187,6 +187,8 @@ def : Processor<"cortex-a8", CortexA8Itineraries,
[ArchV7A, ProcA8]>;
def : Processor<"cortex-a9", CortexA9Itineraries,
[ArchV7A, ProcA9]>;
+def : Processor<"cortex-a9-mp", CortexA9Itineraries,
+ [ArchV7A, ProcA9, FeatureMP]>;
// V7M Processors.
def : ProcNoItin<"cortex-m3", [ArchV7M]>;
diff --git a/test/CodeGen/ARM/prefetch.ll b/test/CodeGen/ARM/prefetch.ll
index 895b27b749..95f082aa93 100644
--- a/test/CodeGen/ARM/prefetch.ll
+++ b/test/CodeGen/ARM/prefetch.ll
@@ -1,10 +1,15 @@
; RUN: llc < %s -march=thumb -mattr=-thumb2 | not grep pld
-; RUN: llc < %s -march=thumb -mattr=+v7a | FileCheck %s -check-prefix=THUMB2
-; RUN: llc < %s -march=arm -mattr=+v7a,+mp | FileCheck %s -check-prefix=ARM-MP
+; RUN: llc < %s -march=thumb -mattr=+v7a | FileCheck %s -check-prefix=THUMB2
+; RUN: llc < %s -march=arm -mattr=+v7a | FileCheck %s -check-prefix=ARM
+; RUN: llc < %s -march=arm -mcpu=cortex-a9-mp | FileCheck %s -check-prefix=ARM-MP
; rdar://8601536
define void @t1(i8* %ptr) nounwind {
entry:
+; ARM: t1:
+; ARM-NOT: pldw [r0]
+; ARM: pld [r0]
+
; ARM-MP: t1:
; ARM-MP: pldw [r0]
; ARM-MP: pld [r0]
@@ -19,8 +24,8 @@ entry:
define void @t2(i8* %ptr) nounwind {
entry:
-; ARM-MP: t2:
-; ARM-MP: pld [r0, #1023]
+; ARM: t2:
+; ARM: pld [r0, #1023]
; THUMB2: t2:
; THUMB2: pld [r0, #1023]
@@ -31,8 +36,8 @@ entry:
define void @t3(i32 %base, i32 %offset) nounwind {
entry:
-; ARM-MP: t3:
-; ARM-MP: pld [r0, r1, lsr #2]
+; ARM: t3:
+; ARM: pld [r0, r1, lsr #2]
; THUMB2: t3:
; THUMB2: lsrs r1, r1, #2
@@ -46,8 +51,8 @@ entry:
define void @t4(i32 %base, i32 %offset) nounwind {
entry:
-; ARM-MP: t4:
-; ARM-MP: pld [r0, r1, lsl #2]
+; ARM: t4:
+; ARM: pld [r0, r1, lsl #2]
; THUMB2: t4:
; THUMB2: pld [r0, r1, lsl #2]