[PowerPC] Fast-isel cleanup patch.

Here are a few miscellaneous things to tidy up the PPC64 fast-isel
implementation.  I corrected a couple of commentary lapses, and added
documentation of future opportunities.  I also implemented
TargetMaterializeAlloca, which I somehow forgot when I split up the
original huge patch.

Finally, I decided to delete SelectCmp.  I hadn't previously hooked it
in to TargetSelectInstruction(), and when I did I realized it wasn't
serving any useful purpose.  This is only useful for compares that
don't feed a branch in the same block, and to handle that we would
have to have logic to interpret i1 as a condition register.  This
could probably be done, but would require Unseemly Hackery, and
honestly does not seem worth the hassle.

This ends the current patch series.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189715 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 37 insertions, 20 deletions

diff --git a/lib/Target/PowerPC/PPCFastISel.cpp b/lib/Target/PowerPC/PPCFastISel.cpp
index 0e789cc397..09cc21b1b6 100644
--- a/lib/Target/PowerPC/PPCFastISel.cpp
+++ b/lib/Target/PowerPC/PPCFastISel.cpp
@@ -37,6 +37,25 @@
 #include "llvm/Target/TargetLowering.h"
 #include "llvm/Target/TargetMachine.h"
 
+//===----------------------------------------------------------------------===//
+//
+// TBD:
+//   FastLowerArguments: Handle simple cases.
+//   PPCMaterializeGV: Handle TLS.
+//   SelectCall: Handle function pointers.
+//   SelectCall: Handle multi-register return values.
+//   SelectCall: Optimize away nops for local calls.
+//   processCallArgs: Handle bit-converted arguments.
+//   finishCall: Handle multi-register return values.
+//   PPCComputeAddress: Handle parameter references as FrameIndex's.
+//   PPCEmitCmp: Handle immediate as operand 1.
+//   SelectCall: Handle small byval arguments.
+//   SelectIntrinsicCall: Implement.
+//   SelectSelect: Implement.
+//   Consider factoring isTypeLegal into the base class.
+//   Implement switches and jump tables.
+//
+//===----------------------------------------------------------------------===//
 using namespace llvm;
 
 namespace {
@@ -1651,23 +1670,6 @@ bool PPCFastISel::SelectIndirectBr(const Instruction *I) {
   return true;
 }
 
-// Attempt to fast-select a compare instruction.
-bool PPCFastISel::SelectCmp(const Instruction *I) {
-  const CmpInst *CI = cast<CmpInst>(I);
-  Optional<PPC::Predicate> OptPPCPred = getComparePred(CI->getPredicate());
-  if (!OptPPCPred)
-    return false;
-
-  unsigned CondReg = createResultReg(&PPC::CRRCRegClass);
-
-  if (!PPCEmitCmp(CI->getOperand(0), CI->getOperand(1), CI->isUnsigned(),
-                  CondReg))
-    return false;
-
-  UpdateValueMap(I, CondReg);
-  return true;
-}
-
 // Attempt to fast-select an integer truncate instruction.
 bool PPCFastISel::SelectTrunc(const Instruction *I) {
   Value *Src  = I->getOperand(0);
@@ -2025,15 +2027,30 @@ unsigned PPCFastISel::TargetMaterializeConstant(const Constant *C) {
     return PPCMaterializeGV(GV, VT);
   else if (isa<ConstantInt>(C))
     return PPCMaterializeInt(C, VT);
-  // TBD: Global values.
 
   return 0;
 }
 
 // Materialize the address created by an alloca into a register, and
-// return the register number (or zero if we failed to handle it).  TBD.
+// return the register number (or zero if we failed to handle it).
 unsigned PPCFastISel::TargetMaterializeAlloca(const AllocaInst *AI) {
-  return AI && 0;
+  // Don't handle dynamic allocas.
+  if (!FuncInfo.StaticAllocaMap.count(AI)) return 0;
+
+  MVT VT;
+  if (!isLoadTypeLegal(AI->getType(), VT)) return 0;
+
+  DenseMap<const AllocaInst*, int>::iterator SI =
+    FuncInfo.StaticAllocaMap.find(AI);
+
+  if (SI != FuncInfo.StaticAllocaMap.end()) {
+    unsigned ResultReg = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass);
+    BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(PPC::ADDI8),
+            ResultReg).addFrameIndex(SI->second).addImm(0);
+    return ResultReg;
+  }
+
+  return 0;
 }
 
 // Fold loads into extends when possible.