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| author | Andrew Trick <atrick@apple.com> | 2013-11-19 03:29:59 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2013-11-19 03:29:59 +0000 |
| commit | d73d4f4ef2d1730942fb4a4ed77b3e4dc7e2d753 (patch) | |
| tree | 56e69627d6525c644b16ff01dedca41285f0d410 | |
| parent | 8ddf988ef4aaa8275bb2b58e9ef8b65ef8009f8c (diff) | |
| download | llvm-d73d4f4ef2d1730942fb4a4ed77b3e4dc7e2d753.tar.gz llvm-d73d4f4ef2d1730942fb4a4ed77b3e4dc7e2d753.tar.bz2 llvm-d73d4f4ef2d1730942fb4a4ed77b3e4dc7e2d753.tar.xz | |
Use symbolic operands in the patchpoint folding routine and fix a spilling bug.
Fixes <rdar://15487687> [JS] AnyRegCC argument ends up being spilled
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195094 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.cpp | 14 | ||||
| -rw-r--r-- | test/CodeGen/X86/anyregcc.ll | 42 |
2 files changed, 47 insertions, 9 deletions
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index d0dfb80a77..2461773742 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -4203,19 +4203,17 @@ static MachineInstr* foldPatchpoint(MachineFunction &MF, const SmallVectorImpl<unsigned> &Ops, int FrameIndex, const TargetInstrInfo &TII) { - bool hasDef = MI->getOperand(0).isReg() && MI->getOperand(0).isDef() && - !MI->getOperand(0).isImplicit(); - unsigned StartIdx = hasDef ? 1 : 0; - + unsigned StartIdx = 0; switch (MI->getOpcode()) { case TargetOpcode::STACKMAP: - StartIdx += 2; // Skip ID, nShadowBytes. + StartIdx = 2; // Skip ID, nShadowBytes. break; - case TargetOpcode::PATCHPOINT: - // Skip ID, numBytes, Target, numArgs. + case TargetOpcode::PATCHPOINT: { // For PatchPoint, the call args are not foldable. - StartIdx += MI->getOperand(StartIdx+3).getImm() + 4; + PatchPointOpers opers(MI); + StartIdx = opers.getVarIdx(); break; + } default: llvm_unreachable("unexpected stackmap opcode"); } diff --git a/test/CodeGen/X86/anyregcc.ll b/test/CodeGen/X86/anyregcc.ll index 97abdebc21..8109f879f2 100644 --- a/test/CodeGen/X86/anyregcc.ll +++ b/test/CodeGen/X86/anyregcc.ll @@ -8,7 +8,7 @@ ; Num Constants ; CHECK-NEXT: .long 0 ; Num Callsites -; CHECK-NEXT: .long 7 +; CHECK-NEXT: .long 8 ; test ; CHECK-NEXT: .long 0 @@ -304,5 +304,45 @@ entry: ret i64 %result } +; Test spilling the arguments of an anyregcc call. +; +; <rdar://problem/15487687> [JS] AnyRegCC argument ends up being spilled +; +; CHECK-LABEL: .long 13 +; CHECK-LABEL: .long L{{.*}}-_patchpoint_spillargs +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 5 +; Loc 0: Return a register +; CHECK-NEXT: .byte 1 +; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .long 0 +; Loc 1: Arg0 in a Register +; CHECK-NEXT: .byte 1 +; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .long 0 +; Loc 2: Arg1 in a Register +; CHECK-NEXT: .byte 1 +; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .long 0 +; Loc 3: Arg2 spilled to RBP + +; CHECK-NEXT: .byte 3 +; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .short 7 +; CHECK-NEXT: .long {{[0-9]+}} +; Loc 4: Arg3 spilled to RBP + +; CHECK-NEXT: .byte 3 +; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .short 7 +; CHECK-NEXT: .long {{[0-9]+}} +define i64 @patchpoint_spillargs(i64 %p1, i64 %p2, i64 %p3, i64 %p4) { +entry: + tail call void asm sideeffect "nop", "~{ax},~{bx},~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind + %result = tail call anyregcc i64 (i32, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64(i32 13, i32 15, i8* inttoptr (i64 0 to i8*), i32 2, i64 %p1, i64 %p2, i64 %p3, i64 %p4) + ret i64 %result +} + declare void @llvm.experimental.patchpoint.void(i32, i32, i8*, i32, ...) declare i64 @llvm.experimental.patchpoint.i64(i32, i32, i8*, i32, ...) |