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authorBenjamin Kramer <benny.kra@googlemail.com>2014-03-11 11:32:49 +0000
committerBenjamin Kramer <benny.kra@googlemail.com>2014-03-11 11:32:49 +0000
commitdabc5073b21bca077cf86a64fde9aa87cf654362 (patch)
treee6ddddd6fb907fa34e59681d00876e9fc56d5e33
parentca396e391e13d417605ebed06780d92c88f14a6b (diff)
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Remove copy ctors that did the same thing as the default one.
The code added nothing but potentially disabled move semantics and made types non-trivially copyable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203563 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--include/llvm/ADT/EquivalenceClasses.h1
-rw-r--r--include/llvm/ADT/STLExtras.h2
-rw-r--r--include/llvm/ADT/SparseMultiSet.h10
-rw-r--r--include/llvm/Analysis/Interval.h3
-rw-r--r--include/llvm/IR/Attributes.h4
-rw-r--r--include/llvm/IR/InlineAsm.h3
-rw-r--r--include/llvm/IR/Metadata.h6
-rw-r--r--include/llvm/Object/RelocVisitor.h1
-rw-r--r--include/llvm/Support/TargetRegistry.h1
-rw-r--r--include/llvm/Target/TargetLowering.h9
-rw-r--r--lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp8
-rw-r--r--lib/IR/InlineAsm.cpp10
-rw-r--r--utils/TableGen/CodeGenRegisters.h5
13 files changed, 0 insertions, 63 deletions
diff --git a/include/llvm/ADT/EquivalenceClasses.h b/include/llvm/ADT/EquivalenceClasses.h
index 1d81772ee8..2256ee7ae4 100644
--- a/include/llvm/ADT/EquivalenceClasses.h
+++ b/include/llvm/ADT/EquivalenceClasses.h
@@ -249,7 +249,6 @@ public:
explicit member_iterator() {}
explicit member_iterator(const ECValue *N) : Node(N) {}
- member_iterator(const member_iterator &I) : Node(I.Node) {}
reference operator*() const {
assert(Node != 0 && "Dereferencing end()!");
diff --git a/include/llvm/ADT/STLExtras.h b/include/llvm/ADT/STLExtras.h
index 66221de2a4..ab6884ffb5 100644
--- a/include/llvm/ADT/STLExtras.h
+++ b/include/llvm/ADT/STLExtras.h
@@ -97,8 +97,6 @@ public:
inline explicit mapped_iterator(const RootIt &I, UnaryFunc F)
: current(I), Fn(F) {}
- inline mapped_iterator(const mapped_iterator &It)
- : current(It.current), Fn(It.Fn) {}
inline value_type operator*() const { // All this work to do this
return Fn(*current); // little change
diff --git a/include/llvm/ADT/SparseMultiSet.h b/include/llvm/ADT/SparseMultiSet.h
index 7f2a6f7d0b..f80f6d7153 100644
--- a/include/llvm/ADT/SparseMultiSet.h
+++ b/include/llvm/ADT/SparseMultiSet.h
@@ -245,16 +245,6 @@ public:
typedef typename super::pointer pointer;
typedef typename super::reference reference;
- iterator_base(const iterator_base &RHS)
- : SMS(RHS.SMS), Idx(RHS.Idx), SparseIdx(RHS.SparseIdx) { }
-
- const iterator_base &operator=(const iterator_base &RHS) {
- SMS = RHS.SMS;
- Idx = RHS.Idx;
- SparseIdx = RHS.SparseIdx;
- return *this;
- }
-
reference operator*() const {
assert(isKeyed() && SMS->sparseIndex(SMS->Dense[Idx].Data) == SparseIdx &&
"Dereferencing iterator of invalid key or index");
diff --git a/include/llvm/Analysis/Interval.h b/include/llvm/Analysis/Interval.h
index 5ce1260eca..01eba3f16c 100644
--- a/include/llvm/Analysis/Interval.h
+++ b/include/llvm/Analysis/Interval.h
@@ -48,9 +48,6 @@ public:
Nodes.push_back(Header);
}
- inline Interval(const Interval &I) // copy ctor
- : HeaderNode(I.HeaderNode), Nodes(I.Nodes), Successors(I.Successors) {}
-
inline BasicBlock *getHeaderNode() const { return HeaderNode; }
/// Nodes - The basic blocks in this interval.
diff --git a/include/llvm/IR/Attributes.h b/include/llvm/IR/Attributes.h
index f240211a54..9eccf40045 100644
--- a/include/llvm/IR/Attributes.h
+++ b/include/llvm/IR/Attributes.h
@@ -403,10 +403,6 @@ public:
addAttribute(A);
}
AttrBuilder(AttributeSet AS, unsigned Idx);
- AttrBuilder(const AttrBuilder &B)
- : Attrs(B.Attrs),
- TargetDepAttrs(B.TargetDepAttrs.begin(), B.TargetDepAttrs.end()),
- Alignment(B.Alignment), StackAlignment(B.StackAlignment) {}
void clear();
diff --git a/include/llvm/IR/InlineAsm.h b/include/llvm/IR/InlineAsm.h
index 652d3710e7..ac190892ba 100644
--- a/include/llvm/IR/InlineAsm.h
+++ b/include/llvm/IR/InlineAsm.h
@@ -164,9 +164,6 @@ public:
///Default constructor.
ConstraintInfo();
- /// Copy constructor.
- ConstraintInfo(const ConstraintInfo &other);
-
/// Parse - Analyze the specified string (e.g. "=*&{eax}") and fill in the
/// fields in this structure. If the constraint string is not understood,
/// return true, otherwise return false.
diff --git a/include/llvm/IR/Metadata.h b/include/llvm/IR/Metadata.h
index 9b044a3729..d054fbba22 100644
--- a/include/llvm/IR/Metadata.h
+++ b/include/llvm/IR/Metadata.h
@@ -219,7 +219,6 @@ class NamedMDNode : public ilist_node<NamedMDNode> {
public:
op_iterator_impl() : Node(0), Idx(0) { }
- op_iterator_impl(const op_iterator_impl &o) : Node(o.Node), Idx(o.Idx) { }
bool operator==(const op_iterator_impl &o) const { return Idx == o.Idx; }
bool operator!=(const op_iterator_impl &o) const { return Idx != o.Idx; }
@@ -242,11 +241,6 @@ class NamedMDNode : public ilist_node<NamedMDNode> {
return tmp;
}
- op_iterator_impl &operator=(const op_iterator_impl &o) {
- Node = o.Node;
- Idx = o.Idx;
- return *this;
- }
T1 operator*() const { return Node->getOperand(Idx); }
};
diff --git a/include/llvm/Object/RelocVisitor.h b/include/llvm/Object/RelocVisitor.h
index 225b83eff3..c72db2ce41 100644
--- a/include/llvm/Object/RelocVisitor.h
+++ b/include/llvm/Object/RelocVisitor.h
@@ -33,7 +33,6 @@ struct RelocToApply {
// The width of the value; how many bytes to touch when applying the
// relocation.
char Width;
- RelocToApply(const RelocToApply &In) : Value(In.Value), Width(In.Width) {}
RelocToApply(int64_t Value, char Width) : Value(Value), Width(Width) {}
RelocToApply() : Value(0), Width(0) {}
};
diff --git a/include/llvm/Support/TargetRegistry.h b/include/llvm/Support/TargetRegistry.h
index f112fca6df..8e7478c155 100644
--- a/include/llvm/Support/TargetRegistry.h
+++ b/include/llvm/Support/TargetRegistry.h
@@ -486,7 +486,6 @@ namespace llvm {
explicit iterator(Target *T) : Current(T) {}
friend struct TargetRegistry;
public:
- iterator(const iterator &I) : Current(I.Current) {}
iterator() : Current(0) {}
bool operator==(const iterator &x) const {
diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h
index 679c820e55..8f00ac8fa3 100644
--- a/include/llvm/Target/TargetLowering.h
+++ b/include/llvm/Target/TargetLowering.h
@@ -2254,15 +2254,6 @@ public:
/// operand it matches.
unsigned getMatchedOperand() const;
- /// Copy constructor for copying from an AsmOperandInfo.
- AsmOperandInfo(const AsmOperandInfo &info)
- : InlineAsm::ConstraintInfo(info),
- ConstraintCode(info.ConstraintCode),
- ConstraintType(info.ConstraintType),
- CallOperandVal(info.CallOperandVal),
- ConstraintVT(info.ConstraintVT) {
- }
-
/// Copy constructor for copying from a ConstraintInfo.
AsmOperandInfo(const InlineAsm::ConstraintInfo &info)
: InlineAsm::ConstraintInfo(info),
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
index 8932f15b37..c28366456a 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
@@ -1539,7 +1539,6 @@ template<class SF>
struct reverse_sort : public queue_sort {
SF &SortFunc;
reverse_sort(SF &sf) : SortFunc(sf) {}
- reverse_sort(const reverse_sort &RHS) : SortFunc(RHS.SortFunc) {}
bool operator()(SUnit* left, SUnit* right) const {
// reverse left/right rather than simply !SortFunc(left, right)
@@ -1559,7 +1558,6 @@ struct bu_ls_rr_sort : public queue_sort {
RegReductionPQBase *SPQ;
bu_ls_rr_sort(RegReductionPQBase *spq) : SPQ(spq) {}
- bu_ls_rr_sort(const bu_ls_rr_sort &RHS) : SPQ(RHS.SPQ) {}
bool operator()(SUnit* left, SUnit* right) const;
};
@@ -1574,8 +1572,6 @@ struct src_ls_rr_sort : public queue_sort {
RegReductionPQBase *SPQ;
src_ls_rr_sort(RegReductionPQBase *spq)
: SPQ(spq) {}
- src_ls_rr_sort(const src_ls_rr_sort &RHS)
- : SPQ(RHS.SPQ) {}
bool operator()(SUnit* left, SUnit* right) const;
};
@@ -1590,8 +1586,6 @@ struct hybrid_ls_rr_sort : public queue_sort {
RegReductionPQBase *SPQ;
hybrid_ls_rr_sort(RegReductionPQBase *spq)
: SPQ(spq) {}
- hybrid_ls_rr_sort(const hybrid_ls_rr_sort &RHS)
- : SPQ(RHS.SPQ) {}
bool isReady(SUnit *SU, unsigned CurCycle) const;
@@ -1609,8 +1603,6 @@ struct ilp_ls_rr_sort : public queue_sort {
RegReductionPQBase *SPQ;
ilp_ls_rr_sort(RegReductionPQBase *spq)
: SPQ(spq) {}
- ilp_ls_rr_sort(const ilp_ls_rr_sort &RHS)
- : SPQ(RHS.SPQ) {}
bool isReady(SUnit *SU, unsigned CurCycle) const;
diff --git a/lib/IR/InlineAsm.cpp b/lib/IR/InlineAsm.cpp
index 9f2a9fea4b..62d191dbce 100644
--- a/lib/IR/InlineAsm.cpp
+++ b/lib/IR/InlineAsm.cpp
@@ -64,16 +64,6 @@ InlineAsm::ConstraintInfo::ConstraintInfo() :
currentAlternativeIndex(0) {
}
-/// Copy constructor.
-InlineAsm::ConstraintInfo::ConstraintInfo(const ConstraintInfo &other) :
- Type(other.Type), isEarlyClobber(other.isEarlyClobber),
- MatchingInput(other.MatchingInput), isCommutative(other.isCommutative),
- isIndirect(other.isIndirect), Codes(other.Codes),
- isMultipleAlternative(other.isMultipleAlternative),
- multipleAlternatives(other.multipleAlternatives),
- currentAlternativeIndex(other.currentAlternativeIndex) {
-}
-
/// Parse - Analyze the specified string (e.g. "==&{eax}") and fill in the
/// fields in this structure. If the constraint string is not understood,
/// return true, otherwise return false.
diff --git a/utils/TableGen/CodeGenRegisters.h b/utils/TableGen/CodeGenRegisters.h
index a44d8b083e..da52c164a0 100644
--- a/utils/TableGen/CodeGenRegisters.h
+++ b/utils/TableGen/CodeGenRegisters.h
@@ -374,11 +374,6 @@ namespace llvm {
unsigned SpillSize;
unsigned SpillAlignment;
- Key(const Key &O)
- : Members(O.Members),
- SpillSize(O.SpillSize),
- SpillAlignment(O.SpillAlignment) {}
-
Key(const CodeGenRegister::Set *M, unsigned S = 0, unsigned A = 0)
: Members(M), SpillSize(S), SpillAlignment(A) {}