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| author | Bill Wendling <isanbard@gmail.com> | 2012-03-10 07:37:27 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2012-03-10 07:37:27 +0000 |
| commit | e060eb8916820fb7a2035dd14c848aa1fd545efe (patch) | |
| tree | 819e40eed219d8ec827d8226a7e98911be31221d | |
| parent | fbf9ff462134a635eb0fc3bc86c70cc59fb065d1 (diff) | |
| download | llvm-e060eb8916820fb7a2035dd14c848aa1fd545efe.tar.gz llvm-e060eb8916820fb7a2035dd14c848aa1fd545efe.tar.bz2 llvm-e060eb8916820fb7a2035dd14c848aa1fd545efe.tar.xz | |
Fix disasm of iret, sysexit, and sysret when displayed with Intel syntax.
Patch by Kay Tiong Khoo!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152487 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrSystem.td | 10 | ||||
| -rw-r--r-- | test/MC/Disassembler/X86/intel-syntax.txt | 22 |
2 files changed, 27 insertions, 5 deletions
diff --git a/lib/Target/X86/X86InstrSystem.td b/lib/Target/X86/X86InstrSystem.td index 884384851a..bddba6cb0c 100644 --- a/lib/Target/X86/X86InstrSystem.td +++ b/lib/Target/X86/X86InstrSystem.td @@ -45,17 +45,17 @@ def INT : Ii8<0xcd, RawFrm, (outs), (ins i8imm:$trap), "int\t$trap", def SYSCALL : I<0x05, RawFrm, (outs), (ins), "syscall", []>, TB; -def SYSRETL : I<0x07, RawFrm, (outs), (ins), "sysretl", []>, TB; -def SYSRETQ :RI<0x07, RawFrm, (outs), (ins), "sysretq", []>, TB, +def SYSRET : I<0x07, RawFrm, (outs), (ins), "sysret{l}", []>, TB; +def SYSRET64 :RI<0x07, RawFrm, (outs), (ins), "sysret{q}", []>, TB, Requires<[In64BitMode]>; def SYSENTER : I<0x34, RawFrm, (outs), (ins), "sysenter", []>, TB; -def SYSEXIT : I<0x35, RawFrm, (outs), (ins), "sysexitl", []>, TB; -def SYSEXIT64 :RI<0x35, RawFrm, (outs), (ins), "sysexitq", []>, TB, +def SYSEXIT : I<0x35, RawFrm, (outs), (ins), "sysexit{l}", []>, TB; +def SYSEXIT64 :RI<0x35, RawFrm, (outs), (ins), "sysexit{q}", []>, TB, Requires<[In64BitMode]>; -def IRET16 : I<0xcf, RawFrm, (outs), (ins), "iretw", []>, OpSize; +def IRET16 : I<0xcf, RawFrm, (outs), (ins), "iret{w}", []>, OpSize; def IRET32 : I<0xcf, RawFrm, (outs), (ins), "iret{l|d}", []>; def IRET64 : RI<0xcf, RawFrm, (outs), (ins), "iretq", []>, Requires<[In64BitMode]>; diff --git a/test/MC/Disassembler/X86/intel-syntax.txt b/test/MC/Disassembler/X86/intel-syntax.txt index 54b242d7b2..e2883c767f 100644 --- a/test/MC/Disassembler/X86/intel-syntax.txt +++ b/test/MC/Disassembler/X86/intel-syntax.txt @@ -77,3 +77,25 @@ # CHECK: test RAX, 0 0x48 0xa9 0x00 0x00 0x00 0x00 + +# CHECK: sysret +0x48 0x0f 0x07 + +# CHECK: sysret +0x0f 0x07 + +# CHECK: sysexit +0x48 0x0f 0x35 + +# CHECK: sysexit +0x0f 0x35 + +# CHECK: iret +0x66 0xcf + +# CHECK: iretd +0xcf + +# CHECK: iretq +0x48 0xcf + |