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| author | Evan Cheng <evan.cheng@apple.com> | 2008-09-05 17:24:07 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2008-09-05 17:24:07 +0000 |
| commit | e2471a9169b23cf13a7e81a6ba35fa2675d320ad (patch) | |
| tree | e375e38bb17450d92118a570b2b98d85a4c97fde | |
| parent | c89d2feb35560883688e43b553b8e94e7cd371de (diff) | |
| download | llvm-e2471a9169b23cf13a7e81a6ba35fa2675d320ad.tar.gz llvm-e2471a9169b23cf13a7e81a6ba35fa2675d320ad.tar.bz2 llvm-e2471a9169b23cf13a7e81a6ba35fa2675d320ad.tar.xz | |
If SSE2 is available, x86 should pass first 3 f32/f64 arguments in XMM registers for fastcc calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55840 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86CallingConv.td | 6 | ||||
| -rw-r--r-- | test/CodeGen/X86/constant-pool-remat-0.ll | 8 | ||||
| -rw-r--r-- | test/CodeGen/X86/fastcc-2.ll | 10 | ||||
| -rw-r--r-- | test/CodeGen/X86/fastcc.ll | 2 |
4 files changed, 21 insertions, 5 deletions
diff --git a/lib/Target/X86/X86CallingConv.td b/lib/Target/X86/X86CallingConv.td index 549eb9b9a2..e720b0b3b2 100644 --- a/lib/Target/X86/X86CallingConv.td +++ b/lib/Target/X86/X86CallingConv.td @@ -352,6 +352,12 @@ def CC_X86_32_FastCC : CallingConv<[ // The first 2 integer arguments are passed in ECX/EDX CCIfType<[i32], CCAssignToReg<[ECX, EDX]>>, + // The first 3 float or double arguments, if the call is not a vararg + // call and if SSE2 is available, are passed in SSE registers. + CCIfNotVarArg<CCIfType<[f32,f64], + CCIfSubtarget<"hasSSE2()", + CCAssignToReg<[XMM0,XMM1,XMM2]>>>>, + // Doubles get 8-byte slots that are 8-byte aligned. CCIfType<[f64], CCAssignToStack<8, 8>>, diff --git a/test/CodeGen/X86/constant-pool-remat-0.ll b/test/CodeGen/X86/constant-pool-remat-0.ll index 144d442d50..40caaa6b93 100644 --- a/test/CodeGen/X86/constant-pool-remat-0.ll +++ b/test/CodeGen/X86/constant-pool-remat-0.ll @@ -1,13 +1,13 @@ ; RUN: llvm-as < %s | llc -march=x86-64 | grep LCPI | count 3 ; RUN: llvm-as < %s | llc -march=x86-64 -stats -info-output-file - | grep asm-printer | grep 6 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep LCPI | count 3 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats -info-output-file - | grep asm-printer | grep 8 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats -info-output-file - | grep asm-printer | grep 12 -declare fastcc float @qux(float %y) +declare float @qux(float %y) -define fastcc float @array(float %a) nounwind { +define float @array(float %a) nounwind { %n = mul float %a, 9.0 - %m = call fastcc float @qux(float %n) + %m = call float @qux(float %n) %o = mul float %m, 9.0 ret float %o } diff --git a/test/CodeGen/X86/fastcc-2.ll b/test/CodeGen/X86/fastcc-2.ll new file mode 100644 index 0000000000..40c753ee30 --- /dev/null +++ b/test/CodeGen/X86/fastcc-2.ll @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | grep movsd +; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | grep mov | count 1 + +define i32 @foo() nounwind { +entry: + tail call fastcc void @bar( double 1.000000e+00 ) nounwind + ret i32 0 +} + +declare fastcc void @bar(double) diff --git a/test/CodeGen/X86/fastcc.ll b/test/CodeGen/X86/fastcc.ll index 13068bada2..07af805117 100644 --- a/test/CodeGen/X86/fastcc.ll +++ b/test/CodeGen/X86/fastcc.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin | grep mov | grep ecx | grep 0 -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin | grep mov | grep xmm0 | grep 16 +; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin | grep mov | grep xmm0 | grep 8 @d = external global double ; <double*> [#uses=1] @c = external global double ; <double*> [#uses=1] |