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| author | Evan Cheng <evan.cheng@apple.com> | 2008-03-10 07:19:13 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2008-03-10 07:19:13 +0000 |
| commit | f79e60649a5edea03bdccf8521d77c15cbb33af4 (patch) | |
| tree | ec61ba44f6cbfaaba814a8a2ab3ab859e8c906ac | |
| parent | 8d88dbcbae38ba4e6d7bd43dd499a13bf091999d (diff) | |
| download | llvm-f79e60649a5edea03bdccf8521d77c15cbb33af4.tar.gz llvm-f79e60649a5edea03bdccf8521d77c15cbb33af4.tar.bz2 llvm-f79e60649a5edea03bdccf8521d77c15cbb33af4.tar.xz | |
Avoid creating BUILD_VECTOR of all zero elements of "non-normalized" type (e.g. v8i16 on x86) after legalizer. Instruction selection does not expect to see them. In all likelihood this can only be an issue in a bugpoint reduced test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48136 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 | ||||
| -rw-r--r-- | test/CodeGen/X86/vec_zero-2.ll | 24 |
2 files changed, 28 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 963a1feba8..1b00855a67 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -1103,6 +1103,10 @@ SDOperand DAGCombiner::visitSUB(SDNode *N) { // fold (sub x, x) -> 0 if (N0 == N1) + if (ISD::isBuildVectorAllZeros(N0.Val)) + // Zero vectors might be normalized to a particular vector type to ensure + // they are CSE'd. Return it as it is. + return N0; return DAG.getConstant(0, N->getValueType(0)); // fold (sub c1, c2) -> c1-c2 if (N0C && N1C) diff --git a/test/CodeGen/X86/vec_zero-2.ll b/test/CodeGen/X86/vec_zero-2.ll new file mode 100644 index 0000000000..efdf5649a1 --- /dev/null +++ b/test/CodeGen/X86/vec_zero-2.ll @@ -0,0 +1,24 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 + +define i32 @t() { +entry: + br i1 true, label %bb4743, label %bb1656 +bb1656: ; preds = %entry + ret i32 0 +bb1664: ; preds = %entry + br i1 false, label %bb5310, label %bb4743 +bb4743: ; preds = %bb1664 + %tmp5256 = bitcast <2 x i64> zeroinitializer to <8 x i16> ; <<8 x i16>> [#uses=1] + %tmp5257 = sub <8 x i16> %tmp5256, zeroinitializer ; <<8 x i16>> [#uses=1] + %tmp5258 = bitcast <8 x i16> %tmp5257 to <2 x i64> ; <<2 x i64>> [#uses=1] + %tmp5265 = bitcast <2 x i64> %tmp5258 to <8 x i16> ; <<8 x i16>> [#uses=1] + %tmp5266 = call <8 x i16> @llvm.x86.sse2.packuswb.128( <8 x i16> %tmp5265, <8 x i16> zeroinitializer ) nounwind readnone ; <<8 x i16>> [#uses=1] + %tmp5267 = bitcast <8 x i16> %tmp5266 to <2 x i64> ; <<2 x i64>> [#uses=1] + %tmp5294 = and <2 x i64> zeroinitializer, %tmp5267 ; <<2 x i64>> [#uses=1] + br label %bb5310 +bb5310: ; preds = %bb4743, %bb1664 + %tmp5294.pn = phi <2 x i64> [ %tmp5294, %bb4743 ], [ zeroinitializer, %bb1664 ] ; <<2 x i64>> [#uses=0] + ret i32 0 +} + +declare <8 x i16> @llvm.x86.sse2.packuswb.128(<8 x i16>, <8 x i16>) nounwind readnone |