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| author | Dale Johannesen <dalej@apple.com> | 2010-05-16 18:22:38 +0000 |
|---|---|---|
| committer | Dale Johannesen <dalej@apple.com> | 2010-05-16 18:22:38 +0000 |
| commit | f9b22429278412fda6e1cae3f5727dbc61ff6770 (patch) | |
| tree | 4ae4698002edc004c925f720316a0aee10764792 | |
| parent | bd91ea53f823fe71c0b67b9a4552984a8b361820 (diff) | |
| download | llvm-f9b22429278412fda6e1cae3f5727dbc61ff6770.tar.gz llvm-f9b22429278412fda6e1cae3f5727dbc61ff6770.tar.bz2 llvm-f9b22429278412fda6e1cae3f5727dbc61ff6770.tar.xz | |
Make x86-64 64-bit bitconvert work when SSE is not available.
(This worked as of about 6 months ago and I didn't track down
exactly what broke it; I think this fix is appropriate.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103911 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 4 | ||||
| -rw-r--r-- | test/CodeGen/X86/2010-05-16-nosseconversion.ll | 11 |
2 files changed, 15 insertions, 0 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 9fa7bb1d3c..35127eb84d 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -217,6 +217,10 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM) if (!X86ScalarSSEf64) { setOperationAction(ISD::BIT_CONVERT , MVT::f32 , Expand); setOperationAction(ISD::BIT_CONVERT , MVT::i32 , Expand); + if (Subtarget->is64Bit()) { + setOperationAction(ISD::BIT_CONVERT , MVT::f64 , Expand); + setOperationAction(ISD::BIT_CONVERT , MVT::i64 , Expand); + } } // Scalar integer divide and remainder are lowered to use operations that diff --git a/test/CodeGen/X86/2010-05-16-nosseconversion.ll b/test/CodeGen/X86/2010-05-16-nosseconversion.ll new file mode 100644 index 0000000000..266681cd16 --- /dev/null +++ b/test/CodeGen/X86/2010-05-16-nosseconversion.ll @@ -0,0 +1,11 @@ +; RUN: llc -mtriple=x86_64-apple-darwin -mattr=-sse < %s + +@x = common global i64 0 ; <i64*> [#uses=1] + +define i32 @foo() nounwind readonly ssp { +entry: + %0 = load i64* @x, align 8 ; <i64> [#uses=1] + %1 = uitofp i64 %0 to double ; <double> [#uses=1] + %2 = fptosi double %1 to i32 ; <i32> [#uses=1] + ret i32 %2 +} |