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author | Evan Cheng <evan.cheng@apple.com> | 2009-09-29 07:07:30 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2009-09-29 07:07:30 +0000 |
commit | fa1be5d99153a4709740ce5aabba3793e9f77982 (patch) | |
tree | 05d47cb41c6aac524ed67e2c85fca34451618e7b | |
parent | 4372e697702dc368fdb86997c6f1d58a2d67ad2b (diff) | |
download | llvm-fa1be5d99153a4709740ce5aabba3793e9f77982.tar.gz llvm-fa1be5d99153a4709740ce5aabba3793e9f77982.tar.bz2 llvm-fa1be5d99153a4709740ce5aabba3793e9f77982.tar.xz |
Fix PR4687. Pre ARMv5te does not support ldrd / strd. Patch by John Tytgat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83058 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 4 | ||||
-rw-r--r-- | test/CodeGen/ARM/2009-09-28-LdStOptiBug.ll | 19 |
2 files changed, 23 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index f1a6c642b8..031f5b0da4 100644 --- a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -1191,6 +1191,10 @@ ARMPreAllocLoadStoreOpt::CanFormLdStDWord(MachineInstr *Op0, MachineInstr *Op1, unsigned &PredReg, ARMCC::CondCodes &Pred, bool &isT2) { + // Make sure we're allowed to generate LDRD/STRD. + if (!STI->hasV5TEOps()) + return false; + // FIXME: FLDS / FSTS -> FLDD / FSTD unsigned Scale = 1; unsigned Opcode = Op0->getOpcode(); diff --git a/test/CodeGen/ARM/2009-09-28-LdStOptiBug.ll b/test/CodeGen/ARM/2009-09-28-LdStOptiBug.ll new file mode 100644 index 0000000000..53bd668259 --- /dev/null +++ b/test/CodeGen/ARM/2009-09-28-LdStOptiBug.ll @@ -0,0 +1,19 @@ +; RUN: llc < %s -mtriple=armv5-unknown-linux-gnueabi -mcpu=arm10tdmi | FileCheck %s +; PR4687 + +%0 = type { double, double } + +define arm_aapcscc void @foo(%0* noalias nocapture sret %agg.result, double %x.0, double %y.0) nounwind { +; CHECK: foo: +; CHECK: bl __adddf3 +; CHECK-NOT: strd +; CHECK: mov + %x76 = fmul double %y.0, 0.000000e+00 ; <double> [#uses=1] + %x77 = fadd double %y.0, 0.000000e+00 ; <double> [#uses=1] + %tmpr = fadd double %x.0, %x76 ; <double> [#uses=1] + %agg.result.0 = getelementptr %0* %agg.result, i32 0, i32 0 ; <double*> [#uses=1] + store double %tmpr, double* %agg.result.0, align 8 + %agg.result.1 = getelementptr %0* %agg.result, i32 0, i32 1 ; <double*> [#uses=1] + store double %x77, double* %agg.result.1, align 8 + ret void +} |