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| author | Amara Emerson <amara.emerson@arm.com> | 2013-10-31 09:32:11 +0000 |
|---|---|---|
| committer | Amara Emerson <amara.emerson@arm.com> | 2013-10-31 09:32:11 +0000 |
| commit | c2884320feebc543d2ce51151d5418dfc18da9e4 (patch) | |
| tree | 0741cd0182a73f25f8f852c90a8b7751323dc4ef /test/MC/Disassembler/AArch64/a64-ignored-fields.txt | |
| parent | 0f5e68e3dc64e7dde41577649ad44b4453859276 (diff) | |
| download | llvm-c2884320feebc543d2ce51151d5418dfc18da9e4.tar.gz llvm-c2884320feebc543d2ce51151d5418dfc18da9e4.tar.bz2 llvm-c2884320feebc543d2ce51151d5418dfc18da9e4.tar.xz | |
[AArch64] Make the use of FP instructions optional, but enabled by default.
This adds a new subtarget feature called FPARMv8 (implied by NEON), and
predicates the support of the FP instructions and registers on this feature.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193739 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Disassembler/AArch64/a64-ignored-fields.txt')
| -rw-r--r-- | test/MC/Disassembler/AArch64/a64-ignored-fields.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/MC/Disassembler/AArch64/a64-ignored-fields.txt b/test/MC/Disassembler/AArch64/a64-ignored-fields.txt index 966530d36a..799ecdfdcd 100644 --- a/test/MC/Disassembler/AArch64/a64-ignored-fields.txt +++ b/test/MC/Disassembler/AArch64/a64-ignored-fields.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc -triple=aarch64 -disassemble -show-encoding < %s | FileCheck %s +# RUN: llvm-mc -triple=aarch64 -mattr=fp-armv8 -disassemble -show-encoding < %s | FileCheck %s # The "Rm" bits are ignored, but the canonical representation has them filled # with 0s. This is what we should produce even if the input bit-pattern had |