diff options
| -rw-r--r-- | lib/Target/ARM64/ARM64InstrInfo.cpp | 11 | ||||
| -rw-r--r-- | lib/Target/R600/AMDGPUMCInstLower.cpp | 6 |
2 files changed, 6 insertions, 11 deletions
diff --git a/lib/Target/ARM64/ARM64InstrInfo.cpp b/lib/Target/ARM64/ARM64InstrInfo.cpp index 75d906d9da..e4112655f8 100644 --- a/lib/Target/ARM64/ARM64InstrInfo.cpp +++ b/lib/Target/ARM64/ARM64InstrInfo.cpp @@ -827,14 +827,11 @@ bool ARM64InstrInfo::optimizeCompareInstr( /// Return true if this is this instruction has a non-zero immediate bool ARM64InstrInfo::hasNonZeroImm(const MachineInstr *MI) const { - switch (MI->getOpcode()) { - default: - if (MI->getOperand(3).isImm()) { - unsigned val = MI->getOperand(3).getImm(); - return (val != 0); - } - break; + if (MI->getOperand(3).isImm()) { + unsigned val = MI->getOperand(3).getImm(); + return (val != 0); } + return false; } diff --git a/lib/Target/R600/AMDGPUMCInstLower.cpp b/lib/Target/R600/AMDGPUMCInstLower.cpp index 66d1074321..b759495ad8 100644 --- a/lib/Target/R600/AMDGPUMCInstLower.cpp +++ b/lib/Target/R600/AMDGPUMCInstLower.cpp @@ -37,10 +37,8 @@ AMDGPUMCInstLower::AMDGPUMCInstLower(MCContext &ctx, const AMDGPUSubtarget &st): { } enum AMDGPUMCInstLower::SISubtarget -AMDGPUMCInstLower::AMDGPUSubtargetToSISubtarget(unsigned Gen) const { - switch (Gen) { - default: return AMDGPUMCInstLower::SI; - } +AMDGPUMCInstLower::AMDGPUSubtargetToSISubtarget(unsigned) const { + return AMDGPUMCInstLower::SI; } unsigned AMDGPUMCInstLower::getMCOpcode(unsigned MIOpcode) const { |