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Diffstat (limited to 'lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp')
-rw-r--r--lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp b/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp
index f2f60c56e4..2100474460 100644
--- a/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp
+++ b/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp
@@ -1,11 +1,11 @@
-//===- HexagonExpandPredSpillCode.cpp - Expand Predicate Spill Code -------===//
+//===-- HexagonExpandPredSpillCode.cpp - Expand Predicate Spill Code ------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
-//===----------------------------------------------------------------------===////
+//===----------------------------------------------------------------------===//
// The Hexagon processor has no instructions that load or store predicate
// registers directly. So, when these registers must be spilled a general
// purpose register must be found and the value copied to/from it from/to