summaryrefslogtreecommitdiff
path: root/lib/Target/X86/X86Subtarget.h
diff options
context:
space:
mode:
Diffstat (limited to 'lib/Target/X86/X86Subtarget.h')
-rw-r--r--lib/Target/X86/X86Subtarget.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/X86/X86Subtarget.h b/lib/Target/X86/X86Subtarget.h
index cac3f579b0..6fbdb1d5f0 100644
--- a/lib/Target/X86/X86Subtarget.h
+++ b/lib/Target/X86/X86Subtarget.h
@@ -130,6 +130,9 @@ protected:
/// HasPRFCHW - Processor has PRFCHW instructions.
bool HasPRFCHW;
+ /// HasRDSEED - Processor has RDSEED instructions.
+ bool HasRDSEED;
+
/// IsBTMemSlow - True if BT (bit test) of memory instructions are slow.
bool IsBTMemSlow;
@@ -266,6 +269,7 @@ public:
bool hasHLE() const { return HasHLE; }
bool hasADX() const { return HasADX; }
bool hasPRFCHW() const { return HasPRFCHW; }
+ bool hasRDSEED() const { return HasRDSEED; }
bool isBTMemSlow() const { return IsBTMemSlow; }
bool isUnalignedMemAccessFast() const { return IsUAMemFast; }
bool hasVectorUAMem() const { return HasVectorUAMem; }