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| author | Bill Wendling <isanbard@gmail.com> | 2013-12-09 02:58:56 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2013-12-09 02:58:56 +0000 |
| commit | dd6669dbb872a69a42a0d8fd77cd48a971cabcc9 (patch) | |
| tree | c39b31440df6dec82bcf1142705a49197c067045 | |
| parent | 525f2f5437929a324a37697f2934fda78931c66a (diff) | |
| download | clang-dd6669dbb872a69a42a0d8fd77cd48a971cabcc9.tar.gz clang-dd6669dbb872a69a42a0d8fd77cd48a971cabcc9.tar.bz2 clang-dd6669dbb872a69a42a0d8fd77cd48a971cabcc9.tar.xz | |
Merging r196724:
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r196724 | tnorthover | 2013-12-08 07:24:55 -0800 (Sun, 08 Dec 2013) | 5 lines
ARM: teach Sema that "r" can match 64-bit values
We already support using "r" on 64-bit values (a GPRPair is
allocated), but Sema doesn't know this yet so issues a warning. This
should fix it.
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git-svn-id: https://llvm.org/svn/llvm-project/cfe/branches/release_34@196746 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Basic/Targets.cpp | 2 | ||||
| -rw-r--r-- | test/Sema/arm-asm.c | 5 |
2 files changed, 6 insertions, 1 deletions
diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp index 4244edfbee..bccd0d72d8 100644 --- a/lib/Basic/Targets.cpp +++ b/lib/Basic/Targets.cpp @@ -4106,7 +4106,7 @@ public: case 'r': { switch (Modifier) { default: - return (isInOut || isOutput || Size <= 32); + return (isInOut || isOutput || Size <= 64); case 'q': // A register of size 32 cannot fit a vector type. return false; diff --git a/test/Sema/arm-asm.c b/test/Sema/arm-asm.c index 3fc0eeb754..e48718b0a2 100644 --- a/test/Sema/arm-asm.c +++ b/test/Sema/arm-asm.c @@ -5,3 +5,8 @@ void f (void) { asm volatile ("lw (r1), %0[val]": "=&b"(Val)); // expected-error {{invalid output constraint '=&b' in asm}} return; } + +void test_64bit_r(void) { + long long foo = 0, bar = 0; + asm volatile("INST %0, %1" : "=r"(foo) : "r"(bar)); +} |