Documentation only.

git-svn-id: https://freertos.svn.sourceforge.net/svnroot/freertos/trunk@458 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

3 files changed, 56 insertions, 3 deletions

diff --git a/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/FreeRTOSConfig.h b/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/FreeRTOSConfig.h
index c9c29aef..e319547c 100644
--- a/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/FreeRTOSConfig.h
+++ b/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/FreeRTOSConfig.h
@@ -62,6 +62,11 @@
  * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.

  *----------------------------------------------------------*/

 

+/*

+ * See http://www.freertos.org/a00110.html for a description of these

+ * configuration constants.

+ */

+

 #define configUSE_PREEMPTION			1

 #define configUSE_IDLE_HOOK				0

 #define configUSE_TICK_HOOK				0

diff --git a/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/FreeRTOS_Tick_Setup.c b/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/FreeRTOS_Tick_Setup.c
index a314857c..8e19f27a 100644
--- a/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/FreeRTOS_Tick_Setup.c
+++ b/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/FreeRTOS_Tick_Setup.c
@@ -50,22 +50,62 @@
 #include "FreeRTOS.h"

 #include "task.h"

 

+/* Constants used to configure the interrupts. */

 #define portPRESCALE_VALUE			64

 #define portPRESCALE_REG_SETTING	( 5 << 8 )

 #define portPIT_INTERRUPT_ENABLED	( 0x08 )

 #define configPIT0_INTERRUPT_VECTOR	( 55 )

 

+/*

+ * FreeRTOS.org requires two interrupts - a tick interrupt generated from a

+ * timer source, and a spare interrupt vector used for context switching.

+ * The configuration below uses PIT0 for the former, and vector 63 for the

+ * latter.  **IF YOUR APPLICATION HAS BOTH OF THESE INTERRUPTS FREE THEN YOU DO

+ * NOT NEED TO CHANGE ANY OF THIS CODE** - otherwise instructions are provided

+ * here for using alternative interrupt sources.

+ *

+ * To change the tick interrupt source:

+ *

+ *	1) Modify vApplicationSetupInterrupts() below to be correct for whichever

+ *	peripheral is to be used to generate the tick interrupt.

+ *

+ *	2) Change the name of the function __cs3_isr_interrupt_119() defined within

+ *	this file to be correct for the interrupt vector used by the timer peripheral.

+ *	The name of the function should contain the vector number, so by default vector

+ *	number 119 is being used.

+ *

+ *	3) Make sure the tick interrupt is cleared within the interrupt handler function.

+ *  Currently __cs3_isr_interrupt_119() clears the PIT0 interrupt.

+ *

+ * To change the spare interrupt source:

+ *

+ *  1) Modify vApplicationSetupInterrupts() below to be correct for whichever

+ *  interrupt vector is to be used.  Make sure you use a spare interrupt on interrupt

+ *  controller 0, otherwise the register used to request context switches will also

+ *  require modification.

+ *

+ *  2) Change the definition of configYIELD_INTERRUPT_VECTOR within FreeRTOSConfig.h

+ *  to be correct for your chosen interrupt vector.

+ *

+ *  3) Change the name of the function __cs3_isr_interrupt_127() within portasm.S

+ *  to be correct for whichever vector number is being used.  By default interrupt

+ *  controller 0 number 63 is used, which corresponds to vector number 127.
+ */

 void vApplicationSetupInterrupts( void )

 {

 const unsigned portSHORT usCompareMatchValue = ( ( configCPU_CLOCK_HZ / portPRESCALE_VALUE ) / configTICK_RATE_HZ );

 

-    /* Configure interrupt priority and level and unmask interrupt. */

+    /* Configure interrupt priority and level and unmask interrupt for PIT0. */

     MCF_INTC0_ICR55 = ( 1 | ( configKERNEL_INTERRUPT_PRIORITY << 3 ) );

     MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK55 );

 

+    /* Do the same for vector 63 (interrupt controller 0.  I don't think the

+    write to MCF_INTC0_IMRH is actually required here but is included for

+    completeness. */

     MCF_INTC0_ICR63 = ( 0 | configKERNEL_INTERRUPT_PRIORITY << 3 );

     MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK63 );

 

+    /* Configure PIT0 to generate the RTOS tick. */

     MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF;

     MCF_PIT0_PCSR = ( portPRESCALE_REG_SETTING | MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_EN );

 	MCF_PIT0_PMR = usCompareMatchValue;

@@ -76,11 +116,16 @@ void __attribute__ ((interrupt)) __cs3_isr_interrupt_119( void )
 {

 unsigned portLONG ulSavedInterruptMask;

 

+	/* Clear the PIT0 interrupt. */

 	MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF;

+

+	/* Increment the RTOS tick. */

 	ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR();

 		vTaskIncrementTick();

 	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulSavedInterruptMask );

 

+	/* If we are using the pre-emptive scheduler then also request a

+	context switch as incrementing the tick could have unblocked a task. */

 	#if configUSE_PREEMPTION == 1

 	{

 		taskYIELD();

diff --git a/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/Makefile b/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/Makefile
index 3ce41d52..4abb17f9 100644
--- a/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/Makefile
+++ b/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/Makefile
@@ -1,5 +1,8 @@
 RM := rm -rf

 

+# Set the optimisation level - this should be set to 0, 1, 2, 3 or s (s for size).

+OPTIM=s

+

 ###############################################################################

 # List the directories that contain files to be built.

 ###############################################################################

@@ -81,9 +84,9 @@ INCLUDE_PATHS=	-I"$(FREERTOS_SOURCE_DIR)/include" \
 

 CFLAGS=		$(INCLUDE_PATHS) \

 			-D COLDFIRE_V2_GCC \

-			-Os \

+			-O$(OPTIM) \

 			-fno-strict-aliasing \

-			-g1 \

+			-g3 \

 			-Wall \

 			-Wextra \

 			-c \