diff options
| author | RichardBarry <RichardBarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2> | 2009-01-29 17:30:54 +0000 |
|---|---|---|
| committer | RichardBarry <RichardBarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2> | 2009-01-29 17:30:54 +0000 |
| commit | 682147fd80f25a2884c0d56ed453fa82ad0e9981 (patch) | |
| tree | a90fb7543a062bccc18a0c892e21b6972bd991da /Source | |
| parent | 75db808dc46be8600a5e7e2b1179868ada3a41e3 (diff) | |
| download | freertos-682147fd80f25a2884c0d56ed453fa82ad0e9981.tar.gz freertos-682147fd80f25a2884c0d56ed453fa82ad0e9981.tar.bz2 freertos-682147fd80f25a2884c0d56ed453fa82ad0e9981.tar.xz | |
Rename to make file name more generic.
git-svn-id: https://freertos.svn.sourceforge.net/svnroot/freertos/trunk@643 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
Diffstat (limited to 'Source')
| -rw-r--r-- | Source/portable/IAR/V850ES/ISR_Support.h | 171 | ||||
| -rw-r--r-- | Source/portable/IAR/V850ES/port.c | 198 | ||||
| -rw-r--r-- | Source/portable/IAR/V850ES/portasm.s85 | 320 | ||||
| -rw-r--r-- | Source/portable/IAR/V850ES/portmacro.h | 153 |
4 files changed, 842 insertions, 0 deletions
diff --git a/Source/portable/IAR/V850ES/ISR_Support.h b/Source/portable/IAR/V850ES/ISR_Support.h new file mode 100644 index 00000000..1047a994 --- /dev/null +++ b/Source/portable/IAR/V850ES/ISR_Support.h @@ -0,0 +1,171 @@ +/*
+ FreeRTOS.org V5.1.1 - Copyright (C) 2003-2008 Richard Barry.
+
+ This file is part of the FreeRTOS distribution.
+
+ FreeRTOS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ FreeRTOS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with FreeRTOS; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+ A special exception to the GPL can be applied should you wish to distribute
+ a combined work that includes FreeRTOS, without being obliged to provide
+ the source code for any proprietary components. See the licensing section
+ of http://www.FreeRTOS.org for full details of how and when the exception
+ can be applied.
+
+ ***************************************************************************
+ ***************************************************************************
+ * *
+ * SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *
+ * and even write all or part of your application on your behalf. *
+ * See http://www.OpenRTOS.com for details of the services we provide to *
+ * expedite your project. *
+ * *
+ ***************************************************************************
+ ***************************************************************************
+
+ Please ensure to read the configuration and relevant port sections of the
+ online documentation.
+
+ http://www.FreeRTOS.org - Documentation, latest information, license and
+ contact details.
+
+ http://www.SafeRTOS.com - A version that is certified for use in safety
+ critical systems.
+
+ http://www.OpenRTOS.com - Commercial support, development, porting,
+ licensing and training services.
+*/
+
+ EXTERN pxCurrentTCB
+ EXTERN usCriticalNesting
+
+#include "FreeRTOSConfig.h"
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; Context save and restore macro definitions
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+portSAVE_CONTEXT MACRO
+
+ add -0x0C,sp ; prepare stack to save necessary values
+ st.w lp,8[sp] ; store LP to stack
+ stsr 0,r31
+ st.w lp,4[sp] ; store EIPC to stack
+ stsr 1,lp
+ st.w lp,0[sp] ; store EIPSW to stack
+#if configDATA_MODE == 1 ; Using the Tiny data model
+ prepare {r20,r21,r22,r23,r24,r25,r26,r27,r28,r29,r30},76,sp ; save general purpose registers
+ sst.w r19,72[ep]
+ sst.w r18,68[ep]
+ sst.w r17,64[ep]
+ sst.w r16,60[ep]
+ sst.w r15,56[ep]
+ sst.w r14,52[ep]
+ sst.w r13,48[ep]
+ sst.w r12,44[ep]
+ sst.w r11,40[ep]
+ sst.w r10,36[ep]
+ sst.w r9,32[ep]
+ sst.w r8,28[ep]
+ sst.w r7,24[ep]
+ sst.w r6,20[ep]
+ sst.w r5,16[ep]
+ sst.w r4,12[ep]
+#else ; Using the Small/Large data model
+ prepare {r20,r21,r22,r23,r24,r26,r27,r28,r29,r30},72,sp ; save general purpose registers
+ sst.w r19,68[ep]
+ sst.w r18,64[ep]
+ sst.w r17,60[ep]
+ sst.w r16,56[ep]
+ sst.w r15,52[ep]
+ sst.w r14,48[ep]
+ sst.w r13,44[ep]
+ sst.w r12,40[ep]
+ sst.w r11,36[ep]
+ sst.w r10,32[ep]
+ sst.w r9,28[ep]
+ sst.w r8,24[ep]
+ sst.w r7,20[ep]
+ sst.w r6,16[ep]
+ sst.w r5,12[ep]
+#endif /* configDATA_MODE */
+ sst.w r2,8[ep]
+ sst.w r1,4[ep]
+ MOVHI hi1(usCriticalNesting),r0,r1 ; save usCriticalNesting value to stack
+ ld.w lw1(usCriticalNesting)[r1],r2
+ sst.w r2,0[ep]
+ MOVHI hi1(pxCurrentTCB),r0,r1 ; save SP to top of current TCB
+ ld.w lw1(pxCurrentTCB)[r1],r2
+ st.w sp,0[r2]
+ ENDM
+
+
+portRESTORE_CONTEXT MACRO
+
+ MOVHI hi1(pxCurrentTCB),r0,r1 ; get Stackpointer address
+ ld.w lw1(pxCurrentTCB)[r1],sp
+ MOV sp,r1
+ ld.w 0[r1],sp ; load stackpointer
+ MOV sp,ep ; set stack pointer to element pointer
+ sld.w 0[ep],r1 ; load usCriticalNesting value from stack
+ MOVHI hi1(usCriticalNesting),r0,r2
+ st.w r1,lw1(usCriticalNesting)[r2]
+ sld.w 4[ep],r1 ; restore general purpose registers
+ sld.w 8[ep],r2
+#if configDATA_MODE == 1 ; Using Tiny data model
+ sld.w 12[ep],r4
+ sld.w 16[ep],r5
+ sld.w 20[ep],r6
+ sld.w 24[ep],r7
+ sld.w 28[ep],r8
+ sld.w 32[ep],r9
+ sld.w 36[ep],r10
+ sld.w 40[ep],r11
+ sld.w 44[ep],r12
+ sld.w 48[ep],r13
+ sld.w 52[ep],r14
+ sld.w 56[ep],r15
+ sld.w 60[ep],r16
+ sld.w 64[ep],r17
+ sld.w 68[ep],r18
+ sld.w 72[ep],r19
+ dispose 76,{r20,r21,r22,r23,r24,r25,r26,r27,r28,r29,r30}
+#else ; Using Small/Large data model
+ sld.w 12[ep],r5
+ sld.w 16[ep],r6
+ sld.w 20[ep],r7
+ sld.w 24[ep],r8
+ sld.w 28[ep],r9
+ sld.w 32[ep],r10
+ sld.w 36[ep],r11
+ sld.w 40[ep],r12
+ sld.w 44[ep],r13
+ sld.w 48[ep],r14
+ sld.w 52[ep],r15
+ sld.w 56[ep],r16
+ sld.w 60[ep],r17
+ sld.w 64[ep],r18
+ sld.w 68[ep],r19
+ dispose 72,{r20,r21,r22,r23,r24,r26,r27,r28,r29,r30}
+#endif /* configDATA_MODE */
+ ld.w 0[sp],lp ; restore EIPSW from stack
+ ldsr lp,1
+ ld.w 4[sp],lp ; restore EIPC from stack
+ ldsr lp,0
+ ld.w 8[sp],lp ; restore LP from stack
+ add 0x0C,sp ; set SP to right position
+
+ RETI
+
+ ENDM
diff --git a/Source/portable/IAR/V850ES/port.c b/Source/portable/IAR/V850ES/port.c new file mode 100644 index 00000000..df9fbbb2 --- /dev/null +++ b/Source/portable/IAR/V850ES/port.c @@ -0,0 +1,198 @@ +/*
+ FreeRTOS.org V5.1.1 - Copyright (C) 2003-2008 Richard Barry.
+
+ This file is part of the FreeRTOS.org distribution.
+
+ FreeRTOS.org is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ FreeRTOS.org is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with FreeRTOS.org; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+ A special exception to the GPL can be applied should you wish to distribute
+ a combined work that includes FreeRTOS.org, without being obliged to provide
+ the source code for any proprietary components. See the licensing section
+ of http://www.FreeRTOS.org for full details of how and when the exception
+ can be applied.
+
+ ***************************************************************************
+ ***************************************************************************
+ * *
+ * SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *
+ * and even write all or part of your application on your behalf. *
+ * See http://www.OpenRTOS.com for details of the services we provide to *
+ * expedite your project. *
+ * *
+ ***************************************************************************
+ ***************************************************************************
+
+ Please ensure to read the configuration and relevant port sections of the
+ online documentation.
+
+ http://www.FreeRTOS.org - Documentation, latest information, license and
+ contact details.
+
+ http://www.SafeRTOS.com - A version that is certified for use in safety
+ critical systems.
+
+ http://www.OpenRTOS.com - Commercial support, development, porting,
+ licensing and training services.
+*/
+
+/* Standard includes. */
+#include <stdlib.h>
+
+/* Scheduler includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+
+/* Critical nesting should be initialised to a non zero value so interrupts don't
+accidentally get enabled before the scheduler is started. */
+#define portINITIAL_CRITICAL_NESTING (( portSTACK_TYPE ) 10)
+
+/* The PSW value assigned to tasks when they start to run for the first time. */
+#define portPSW (( portSTACK_TYPE ) 0x00000000)
+
+/* We require the address of the pxCurrentTCB variable, but don't want to know
+any details of its type. */
+typedef void tskTCB;
+extern volatile tskTCB * volatile pxCurrentTCB;
+
+/* Keeps track of the nesting level of critical sections. */
+volatile portSTACK_TYPE usCriticalNesting = portINITIAL_CRITICAL_NESTING;
+/*-----------------------------------------------------------*/
+
+/* Sets up the timer to generate the tick interrupt. */
+static void prvSetupTimerInterrupt( void );
+
+/*-----------------------------------------------------------*/
+portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
+{
+ *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* Task function start address */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* Task function start address */
+ pxTopOfStack--;
+ *pxTopOfStack = portPSW; /* Initial PSW value */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x20202020; /* Initial Value of R20 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x21212121; /* Initial Value of R21 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x22222222; /* Initial Value of R22 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x23232323; /* Initial Value of R23 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x24242424; /* Initial Value of R24 */
+ pxTopOfStack--;
+#if (__DATA_MODEL__ == 0) || (__DATA_MODEL__ == 1)
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x25252525; /* Initial Value of R25 */
+ pxTopOfStack--;
+#endif /* configDATA_MODE */
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x26262626; /* Initial Value of R26 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x27272727; /* Initial Value of R27 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x28282828; /* Initial Value of R28 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x29292929; /* Initial Value of R29 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x30303030; /* Initial Value of R30 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x19191919; /* Initial Value of R19 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x18181818; /* Initial Value of R18 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x17171717; /* Initial Value of R17 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x16161616; /* Initial Value of R16 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x15151515; /* Initial Value of R15 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x14141414; /* Initial Value of R14 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x13131313; /* Initial Value of R13 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* Initial Value of R12 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* Initial Value of R11 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* Initial Value of R10 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x99999999; /* Initial Value of R09 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x88888888; /* Initial Value of R08 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x77777777; /* Initial Value of R07 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x66666666; /* Initial Value of R06 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x55555555; /* Initial Value of R05 */
+ pxTopOfStack--;
+#if __DATA_MODEL__ == 0 || __DATA_MODEL__ == 1
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x44444444; /* Initial Value of R04 */
+ pxTopOfStack--;
+#endif /* configDATA_MODE */
+ *pxTopOfStack = ( portSTACK_TYPE ) 0x22222222; /* Initial Value of R02 */
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R1 is expected to hold the function parameter*/
+ pxTopOfStack--;
+ *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_SECTION_NESTING;
+
+ /*
+ * Return a pointer to the top of the stack we have generated so this can
+ * be stored in the task control block for the task.
+ */
+ return pxTopOfStack;
+}
+/*-----------------------------------------------------------*/
+
+portBASE_TYPE xPortStartScheduler( void )
+{
+ /* Setup the hardware to generate the tick. Interrupts are disabled when
+ this function is called. */
+ prvSetupTimerInterrupt();
+
+ /* Restore the context of the first task that is going to run. */
+ vPortStart();
+
+ /* Should not get here as the tasks are now running! */
+ return pdTRUE;
+}
+/*-----------------------------------------------------------*/
+
+void vPortEndScheduler( void )
+{
+ /* It is unlikely that the V850ES/Fx3 port will get stopped. If required simply
+ disable the tick interrupt here. */
+}
+/*-----------------------------------------------------------*/
+
+/*
+ * Hardware initialisation to generate the RTOS tick. This uses
+ */
+static void prvSetupTimerInterrupt( void )
+{
+ TM0CE = 0; /* TMM0 operation disable */
+ TM0EQMK0 = 1; /* INTTM0EQ0 interrupt disable */
+ TM0EQIF0 = 0; /* clear INTTM0EQ0 interrupt flag */
+
+ /* Set INTTM0EQ0 level 5 priority */
+ TM0EQIC0 &= 0xF8;
+ TM0CTL0 = 0x00;
+ TM0CMP0 = (((configCPU_CLOCK_HZ / configTICK_RATE_HZ) / 2)-1); /* divided by 2 because peripherals only run at CPU_CLOCK/2 */
+
+ TM0EQIF0 = 0; /* clear INTTM0EQ0 interrupt flag */
+ TM0EQMK0 = 0; /* INTTM0EQ0 interrupt enable */
+ TM0CE = 1; /* TMM0 operation enable */
+}
+/*-----------------------------------------------------------*/
+
+
diff --git a/Source/portable/IAR/V850ES/portasm.s85 b/Source/portable/IAR/V850ES/portasm.s85 new file mode 100644 index 00000000..20e1e625 --- /dev/null +++ b/Source/portable/IAR/V850ES/portasm.s85 @@ -0,0 +1,320 @@ +; FreeRTOS.org V5.1.1 - Copyright (C) 2003-2008 Richard Barry.
+;
+; This file is part of the FreeRTOS.org distribution.
+;
+; FreeRTOS.org is free software; you can redistribute it and/or modify
+; it under the terms of the GNU General Public License as published by
+; the Free Software Foundation; either version 2 of the License, or
+; (at your option) any later version.
+;
+; FreeRTOS.org is distributed in the hope that it will be useful,
+; but WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+; GNU General Public License for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with FreeRTOS.org; if not, write to the Free Software
+; Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+;
+; A special exception to the GPL can be applied should you wish to distribute
+; a combined work that includes FreeRTOS.org, without being obliged to provide
+; the source code for any proprietary components. See the licensing section
+; of http://www.FreeRTOS.org for full details of how and when the exception
+; can be applied.
+;
+; ***************************************************************************
+; See http://www.FreeRTOS.org for documentation, latest information, license
+; and contact details. Please ensure to read the configuration and relevant
+; port sections of the online documentation.
+; ***************************************************************************
+;
+;------------------------------------------------------------------------------
+; Note: Select the correct include files for the device used by the application.
+#include "FreeRTOSConfig.h"
+;------------------------------------------------------------------------------
+
+; Functions used by scheduler
+;------------------------------------------------------------------------------
+ EXTERN vTaskSwitchContext
+ EXTERN vTaskIncrementTick
+
+; Variables used by scheduler
+;------------------------------------------------------------------------------
+ EXTERN pxCurrentTCB
+ EXTERN usCriticalNesting
+
+; Functions implemented in this file
+;------------------------------------------------------------------------------
+ PUBLIC vPortYield
+ PUBLIC vPortStart
+
+; Security ID definition
+;------------------------------------------------------------------------------
+#define CG_SECURITY0 0FFH
+#define CG_SECURITY1 0FFH
+#define CG_SECURITY2 0FFH
+#define CG_SECURITY3 0FFH
+#define CG_SECURITY4 0FFH
+#define CG_SECURITY5 0FFH
+#define CG_SECURITY6 0FFH
+#define CG_SECURITY7 0FFH
+#define CG_SECURITY8 0FFH
+#define CG_SECURITY9 0FFH
+
+; Tick ISR Prototype
+;------------------------------------------------------------------------------
+ PUBWEAK `??MD_INTTM0EQ0??INTVEC 640`
+ PUBLIC MD_INTTM0EQ0
+
+MD_INTTM0EQ0 SYMBOL "MD_INTTM0EQ0"
+`??MD_INTTM0EQ0??INTVEC 640` SYMBOL "??INTVEC 640", MD_INTTM0EQ0
+
+;------------------------------------------------------------------------------
+; portSAVE_CONTEXT MACRO
+; Saves the context of the remaining general purpose registers
+; and the usCriticalNesting Value of the active Task onto the task stack
+; saves stack pointer to the TCB
+;------------------------------------------------------------------------------
+portSAVE_CONTEXT MACRO
+#if configDATA_MODE == 1 ; Using the Tiny data model
+ prepare {r20,r21,r22,r23,r24,r25,r26,r27,r28,r29,r30},76,sp ; save general purpose registers
+ sst.w r19,72[ep]
+ sst.w r18,68[ep]
+ sst.w r17,64[ep]
+ sst.w r16,60[ep]
+ sst.w r15,56[ep]
+ sst.w r14,52[ep]
+ sst.w r13,48[ep]
+ sst.w r12,44[ep]
+ sst.w r11,40[ep]
+ sst.w r10,36[ep]
+ sst.w r9,32[ep]
+ sst.w r8,28[ep]
+ sst.w r7,24[ep]
+ sst.w r6,20[ep]
+ sst.w r5,16[ep]
+ sst.w r4,12[ep]
+#else ; Using the Small/Large data model
+ prepare {r20,r21,r22,r23,r24,r26,r27,r28,r29,r30},72,sp ; save general purpose registers
+ sst.w r19,68[ep]
+ sst.w r18,64[ep]
+ sst.w r17,60[ep]
+ sst.w r16,56[ep]
+ sst.w r15,52[ep]
+ sst.w r14,48[ep]
+ sst.w r13,44[ep]
+ sst.w r12,40[ep]
+ sst.w r11,36[ep]
+ sst.w r10,32[ep]
+ sst.w r9,28[ep]
+ sst.w r8,24[ep]
+ sst.w r7,20[ep]
+ sst.w r6,16[ep]
+ sst.w r5,12[ep]
+#endif /* configDATA_MODE */
+ sst.w r2,8[ep]
+ sst.w r1,4[ep]
+ MOVHI hi1(usCriticalNesting),r0,r1 ; save usCriticalNesting value to stack
+ ld.w lw1(usCriticalNesting)[r1],r2
+ sst.w r2,0[ep]
+ MOVHI hi1(pxCurrentTCB),r0,r1 ; save SP to top of current TCB
+ ld.w lw1(pxCurrentTCB)[r1],r2
+ st.w sp,0[r2]
+ ENDM
+;------------------------------------------------------------------------------
+
+;------------------------------------------------------------------------------
+; portRESTORE_CONTEXT MACRO
+; Gets stack pointer from the current TCB
+; Restores the context of the usCriticalNesting value and general purpose
+; registers of the selected task from the task stack
+;------------------------------------------------------------------------------
+portRESTORE_CONTEXT MACRO
+ MOVHI hi1(pxCurrentTCB),r0,r1 ; get Stackpointer address
+ ld.w lw1(pxCurrentTCB)[r1],sp
+ MOV sp,r1
+ ld.w 0[r1],sp ; load stackpointer
+ MOV sp,ep ; set stack pointer to element pointer
+ sld.w 0[ep],r1 ; load usCriticalNesting value from stack
+ MOVHI hi1(usCriticalNesting),r0,r2
+ st.w r1,lw1(usCriticalNesting)[r2]
+ sld.w 4[ep],r1 ; restore general purpose registers
+ sld.w 8[ep],r2
+#if configDATA_MODE == 1 ; Using Tiny data model
+ sld.w 12[ep],r4
+ sld.w 16[ep],r5
+ sld.w 20[ep],r6
+ sld.w 24[ep],r7
+ sld.w 28[ep],r8
+ sld.w 32[ep],r9
+ sld.w 36[ep],r10
+ sld.w 40[ep],r11
+ sld.w 44[ep],r12
+ sld.w 48[ep],r13
+ sld.w 52[ep],r14
+ sld.w 56[ep],r15
+ sld.w 60[ep],r16
+ sld.w 64[ep],r17
+ sld.w 68[ep],r18
+ sld.w 72[ep],r19
+ dispose 76,{r20,r21,r22,r23,r24,r25,r26,r27,r28,r29,r30}
+#else ; Using Small/Large data model
+ sld.w 12[ep],r5
+ sld.w 16[ep],r6
+ sld.w 20[ep],r7
+ sld.w 24[ep],r8
+ sld.w 28[ep],r9
+ sld.w 32[ep],r10
+ sld.w 36[ep],r11
+ sld.w 40[ep],r12
+ sld.w 44[ep],r13
+ sld.w 48[ep],r14
+ sld.w 52[ep],r15
+ sld.w 56[ep],r16
+ sld.w 60[ep],r17
+ sld.w 64[ep],r18
+ sld.w 68[ep],r19
+ dispose 72,{r20,r21,r22,r23,r24,r26,r27,r28,r29,r30}
+#endif /* configDATA_MODE */
+ ENDM
+;------------------------------------------------------------------------------
+
+;------------------------------------------------------------------------------
+; Restore the context of the first task that is going to run.
+;
+; Input: NONE
+;
+; Call: CALL vPortStart
+;
+; Output: NONE
+;------------------------------------------------------------------------------
+ RSEG CODE:CODE
+vPortStart:
+ portRESTORE_CONTEXT ; Restore the context of whichever task the ...
+ ld.w 0[sp],lp
+ ldsr lp,5 ; restore PSW
+ DI
+ ld.w 4[sp],lp ; restore LP
+ ld.w 8[sp],lp ; restore LP
+ ADD 0x0C,sp ; set SP to right position
+ EI
+ jmp [lp]
+;------------------------------------------------------------------------------
+
+;------------------------------------------------------------------------------
+; Port Yield function to check for a Task switch in the cooperative and
+; preemptive mode
+;
+; Input: NONE
+;
+; Call: CALL vPortYield
+;
+; Output: NONE
+;------------------------------------------------------------------------------
+
+ RSEG CODE:CODE
+vPortYield:
+
+ add -0x0C,sp ; prepare stack to save necessary values
+ st.w lp,8[sp] ; store LP to stack
+ stsr 0,r31
+ st.w lp,4[sp] ; store EIPC to stack
+ stsr 1,lp
+ st.w lp,0[sp] ; store EIPSW to stack
+ portSAVE_CONTEXT ; Save the context of the current task.
+ jarl vTaskSwitchContext,lp ; Call the scheduler.
+ portRESTORE_CONTEXT ; Restore the context of whichever task the ...
+ ; ... scheduler decided should run.
+ ld.w 0[sp],lp ; restore EIPSW from stack
+ ldsr lp,1
+ ld.w 4[sp],lp ; restore EIPC from stack
+ ldsr lp,0
+ ld.w 8[sp],lp ; restore LP from stack
+ add 0x0C,sp ; set SP to right position
+
+ RETI
+
+;------------------------------------------------------------------------------
+
+;------------------------------------------------------------------------------
+; Perform the necessary steps of the Tick Count Increment and Task Switch
+; depending on the chosen kernel configuration
+;
+; Input: NONE
+;
+; Call: ISR
+;
+; Output: NONE
+;------------------------------------------------------------------------------
+#if configUSE_PREEMPTION == 1 ; use preemptive kernel mode
+
+MD_INTTM0EQ0:
+
+ add -0x0C,sp ; prepare stack to save necessary values
+ st.w lp,8[sp] ; store LP to stack
+ stsr 0,r31
+ st.w lp,4[sp] ; store EIPC to stack
+ stsr 1,lp
+ st.w lp,0[sp] ; store EIPSW to stack
+ portSAVE_CONTEXT ; Save the context of the current task.
+ jarl vTaskIncrementTick,lp ; Call the timer tick function.
+ jarl vTaskSwitchContext,lp ; Call the scheduler.
+ portRESTORE_CONTEXT ; Restore the context of whichever task the ...
+ ; ... scheduler decided should run.
+ ld.w 0[sp],lp ; restore EIPSW from stack
+ ldsr lp,1
+ ld.w 4[sp],lp ; restore EIPC from stack
+ ldsr lp,0
+ ld.w 8[sp],lp ; restore LP from stack
+ add 0x0C,sp ; set SP to right position
+
+ RETI
+;------------------------------------------------------------------------------
+#else ; use cooperative kernel mode
+
+MD_INTTM0EQ0:
+ prepare {lp,ep},8,sp
+ sst.w r1,4[ep]
+ sst.w r5,0[ep]
+ jarl vTaskIncrementTick,lp ; Call the timer tick function.
+ sld.w 0[ep],r5
+ sld.w 4[ep],r1
+ dispose 8,{lp,ep}
+ RETI
+#endif /* configUSE_PREEMPTION */
+
+;------------------------------------------------------------------------------
+ COMMON INTVEC:CODE:ROOT(2)
+ ORG 640
+`??MD_INTTM0EQ0??INTVEC 640`:
+ JR MD_INTTM0EQ0
+
+ RSEG NEAR_ID:CONST:SORT:NOROOT(2)
+`?<Initializer for usCriticalNesting>`:
+ DW 10
+
+ COMMON INTVEC:CODE:ROOT(2)
+ ORG 40H
+`??vPortYield??INTVEC 40`:
+ JR vPortYield
+
+;------------------------------------------------------------------------------
+; set microcontroller security ID
+
+ COMMON INTVEC:CODE:ROOT(2)
+ ORG 70H
+`SECUID`:
+ DB CG_SECURITY0
+ DB CG_SECURITY1
+ DB CG_SECURITY2
+ DB CG_SECURITY3
+ DB CG_SECURITY4
+ DB CG_SECURITY5
+ DB CG_SECURITY6
+ DB CG_SECURITY7
+ DB CG_SECURITY8
+ DB CG_SECURITY9
+
+
+ END
+
diff --git a/Source/portable/IAR/V850ES/portmacro.h b/Source/portable/IAR/V850ES/portmacro.h new file mode 100644 index 00000000..92afd1b3 --- /dev/null +++ b/Source/portable/IAR/V850ES/portmacro.h @@ -0,0 +1,153 @@ +/*
+ FreeRTOS.org V5.1.1 - Copyright (C) 2003-2008 Richard Barry.
+
+ This file is part of the FreeRTOS.org distribution.
+
+ FreeRTOS.org is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ FreeRTOS.org is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with FreeRTOS.org; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+ A special exception to the GPL can be applied should you wish to distribute
+ a combined work that includes FreeRTOS.org, without being obliged to provide
+ the source code for any proprietary components. See the licensing section
+ of http://www.FreeRTOS.org for full details of how and when the exception
+ can be applied.
+
+ ***************************************************************************
+ ***************************************************************************
+ * *
+ * SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *
+ * and even write all or part of your application on your behalf. *
+ * See http://www.OpenRTOS.com for details of the services we provide to *
+ * expedite your project. *
+ * *
+ ***************************************************************************
+ ***************************************************************************
+
+ Please ensure to read the configuration and relevant port sections of the
+ online documentation.
+
+ http://www.FreeRTOS.org - Documentation, latest information, license and
+ contact details.
+
+ http://www.SafeRTOS.com - A version that is certified for use in safety
+ critical systems.
+
+ http://www.OpenRTOS.com - Commercial support, development, porting,
+ licensing and training services.
+*/
+
+#ifndef PORTMACRO_H
+#define PORTMACRO_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*-----------------------------------------------------------
+ * Port specific definitions.
+ *
+ * The settings in this file configure FreeRTOS correctly for the
+ * given hardware and compiler.
+ *
+ * These settings should not be altered.
+ *-----------------------------------------------------------
+ */
+
+/* Type definitions. */
+#define portCHAR char
+#define portFLOAT float
+#define portDOUBLE double
+#define portLONG long
+#define portSHORT short
+#define portSTACK_TYPE unsigned int
+#define portBASE_TYPE int
+
+
+#if (configUSE_16_BIT_TICKS==1)
+ typedef unsigned portSHORT portTickType;
+ #define portMAX_DELAY ( portTickType ) 0xffff
+#else
+ typedef unsigned portLONG portTickType;
+ #define portMAX_DELAY ( portTickType ) 0xffffffff
+#endif
+/*-----------------------------------------------------------*/
+
+/* Interrupt control macros. */
+#define portDISABLE_INTERRUPTS() __asm ( "DI" )
+#define portENABLE_INTERRUPTS() __asm ( "EI" )
+/*-----------------------------------------------------------*/
+
+/* Critical section control macros. */
+#define portNO_CRITICAL_SECTION_NESTING ( ( unsigned portBASE_TYPE ) 0 )
+
+#define portENTER_CRITICAL() \
+{ \
+extern volatile /*unsigned portSHORT*/ portSTACK_TYPE usCriticalNesting; \
+ \
+ portDISABLE_INTERRUPTS(); \
+ \
+ /* Now interrupts are disabled ulCriticalNesting can be accessed */ \
+ /* directly. Increment ulCriticalNesting to keep a count of how many */ \
+ /* times portENTER_CRITICAL() has been called. */ \
+ usCriticalNesting++; \
+}
+
+#define portEXIT_CRITICAL() \
+{ \
+extern volatile /*unsigned portSHORT*/ portSTACK_TYPE usCriticalNesting; \
+ \
+ if( usCriticalNesting > portNO_CRITICAL_SECTION_NESTING ) \
+ { \
+ /* Decrement the nesting count as we are leaving a critical section. */ \
+ usCriticalNesting--; \
+ \
+ /* If the nesting level has reached zero then interrupts should be */ \
+ /* re-enabled. */ \
+ if( usCriticalNesting == portNO_CRITICAL_SECTION_NESTING ) \
+ { \
+ portENABLE_INTERRUPTS(); \
+ } \
+ } \
+}
+/*-----------------------------------------------------------*/
+
+/* Task utilities. */
+extern void vPortYield( void );
+extern void vPortStart( void );
+extern void portSAVE_CONTEXT( void );
+extern void portRESTORE_CONTEXT( void );
+#define portYIELD() __asm ( "trap 0" )
+#define portNOP() __asm ( "NOP" )
+extern void vTaskSwitchContext( void );
+#define portYIELD_FROM_ISR( xHigherPriorityTaskWoken ) if( xHigherPriorityTaskWoken ) vTaskSwitchContext();
+
+/*-----------------------------------------------------------*/
+
+/* Hardwware specifics. */
+#define portBYTE_ALIGNMENT 4
+#define portSTACK_GROWTH ( -1 )
+#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
+/*-----------------------------------------------------------*/
+
+/* Task function macros as described on the FreeRTOS.org WEB site. */
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
+#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PORTMACRO_H */
+
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