1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
|
/*
FreeRTOS.org V5.1.1 - Copyright (C) 2003-2008 Richard Barry.
This file is part of the FreeRTOS.org distribution.
FreeRTOS.org is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS.org is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS.org; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
***************************************************************************
* *
* SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *
* and even write all or part of your application on your behalf. *
* See http://www.OpenRTOS.com for details of the services we provide to *
* expedite your project. *
* *
***************************************************************************
***************************************************************************
Please ensure to read the configuration and relevant port sections of the
online documentation.
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
#include <p32xxxx.h>
#include <sys/asm.h>
.set nomips16
.set noreorder
.global vRegTest1
.global vRegTest2
/* .section .FreeRTOS, ax, @progbits */
.set noreorder
.set noat
.ent vRegTest1
/* Address of $4 ulStatus1 is held in A0, so don't mess with the value of $4 */
vRegTest1:
addiu $1, $0, 0x11
addiu $2, $0, 0x12
addiu $3, $0, 0x13
addiu $5, $0, 0x15
addiu $6, $0, 0x16
addiu $7, $0, 0x17
addiu $8, $0, 0x18
addiu $9, $0, 0x19
addiu $10, $0, 0x110
addiu $11, $0, 0x111
addiu $12, $0, 0x112
addiu $13, $0, 0x113
addiu $14, $0, 0x114
addiu $15, $0, 0x115
addiu $16, $0, 0x116
addiu $17, $0, 0x117
addiu $18, $0, 0x118
addiu $19, $0, 0x119
addiu $20, $0, 0x120
addiu $21, $0, 0x121
addiu $22, $0, 0x122
addiu $23, $0, 0x123
addiu $24, $0, 0x124
addiu $25, $0, 0x125
addiu $30, $0, 0x130
addiu $1, $1, -0x11
beq $1, $0, .+12
nop
sw $0, 0($4)
addiu $2, $2, -0x12
beq $2, $0, .+12
nop
sw $0, 0($4)
addiu $3, $3, -0x13
beq $3, $0, .+12
nop
sw $0, 0($4)
addiu $5, $5, -0x15
beq $5, $0, .+12
nop
sw $0, 0($4)
addiu $6, $6, -0x16
beq $6, $0, .+12
nop
sw $0, 0($4)
addiu $7, $7, -0x17
beq $7, $0, .+12
nop
sw $0, 0($4)
addiu $8, $8, -0x18
beq $8, $0, .+12
nop
sw $0, 0($4)
addiu $9, $9, -0x19
beq $9, $0, .+12
nop
sw $0, 0($4)
addiu $10, $10, -0x110
beq $10, $0, .+12
nop
sw $0, 0($4)
addiu $11, $11, -0x111
beq $11, $0, .+12
nop
sw $0, 0($4)
addiu $12, $12, -0x112
beq $12, $0, .+12
nop
sw $0, 0($4)
addiu $13, $13, -0x113
beq $13, $0, .+12
nop
sw $0, 0($4)
addiu $14, $14, -0x114
beq $14, $0, .+12
nop
sw $0, 0($4)
addiu $15, $15, -0x115
beq $15, $0, .+12
nop
sw $0, 0($4)
addiu $16, $16, -0x116
beq $16, $0, .+12
nop
sw $0, 0($4)
addiu $17, $17, -0x117
beq $17, $0, .+12
nop
sw $0, 0($4)
addiu $18, $18, -0x118
beq $18, $0, .+12
nop
sw $0, 0($4)
addiu $19, $19, -0x119
beq $19, $0, .+12
nop
sw $0, 0($4)
addiu $20, $20, -0x120
beq $20, $0, .+12
nop
sw $0, 0($4)
addiu $21, $21, -0x121
beq $21, $0, .+12
nop
sw $0, 0($4)
addiu $22, $22, -0x122
beq $22, $0, .+12
nop
sw $0, 0($4)
addiu $23, $23, -0x123
beq $23, $0, .+12
nop
sw $0, 0($4)
addiu $24, $24, -0x124
beq $24, $0, .+12
nop
sw $0, 0($4)
addiu $25, $25, -0x125
beq $25, $0, .+12
nop
sw $0, 0($4)
addiu $30, $30, -0x130
beq $30, $0, .+12
nop
sw $0, 0($4)
jr $31
nop
.end vRegTest1
/* .section .FreeRTOS, ax, @progbits */
.set noreorder
.set noat
.ent vRegTest2
vRegTest2:
addiu $1, $0, 0x10
addiu $2, $0, 0x20
addiu $3, $0, 0x30
addiu $5, $0, 0x50
addiu $6, $0, 0x60
addiu $7, $0, 0x70
addiu $8, $0, 0x80
addiu $9, $0, 0x90
addiu $10, $0, 0x100
addiu $11, $0, 0x110
addiu $12, $0, 0x120
addiu $13, $0, 0x130
addiu $14, $0, 0x140
addiu $15, $0, 0x150
addiu $16, $0, 0x160
addiu $17, $0, 0x170
addiu $18, $0, 0x180
addiu $19, $0, 0x190
addiu $20, $0, 0x200
addiu $21, $0, 0x210
addiu $22, $0, 0x220
addiu $23, $0, 0x230
addiu $24, $0, 0x240
addiu $25, $0, 0x250
addiu $30, $0, 0x300
addiu $1, $1, -0x10
beq $1, $0, .+12
nop
sw $0, 0($4)
addiu $2, $2, -0x20
beq $2, $0, .+12
nop
sw $0, 0($4)
addiu $3, $3, -0x30
beq $3, $0, .+12
nop
sw $0, 0($4)
addiu $5, $5, -0x50
beq $5, $0, .+12
nop
sw $0, 0($4)
addiu $6, $6, -0x60
beq $6, $0, .+12
nop
sw $0, 0($4)
addiu $7, $7, -0x70
beq $7, $0, .+12
nop
sw $0, 0($4)
addiu $8, $8, -0x80
beq $8, $0, .+12
nop
sw $0, 0($4)
addiu $9, $9, -0x90
beq $9, $0, .+12
nop
sw $0, 0($4)
addiu $10, $10, -0x100
beq $10, $0, .+12
nop
sw $0, 0($4)
addiu $11, $11, -0x110
beq $11, $0, .+12
nop
sw $0, 0($4)
addiu $12, $12, -0x120
beq $12, $0, .+12
nop
sw $0, 0($4)
addiu $13, $13, -0x130
beq $13, $0, .+12
nop
sw $0, 0($4)
addiu $14, $14, -0x140
beq $14, $0, .+12
nop
sw $0, 0($4)
addiu $15, $15, -0x150
beq $15, $0, .+12
nop
sw $0, 0($4)
addiu $16, $16, -0x160
beq $16, $0, .+12
nop
sw $0, 0($4)
addiu $17, $17, -0x170
beq $17, $0, .+12
nop
sw $0, 0($4)
addiu $18, $18, -0x180
beq $18, $0, .+12
nop
sw $0, 0($4)
addiu $19, $19, -0x190
beq $19, $0, .+12
nop
sw $0, 0($4)
addiu $20, $20, -0x200
beq $20, $0, .+12
nop
sw $0, 0($4)
addiu $21, $21, -0x210
beq $21, $0, .+12
nop
sw $0, 0($4)
addiu $22, $22, -0x220
beq $22, $0, .+12
nop
sw $0, 0($4)
addiu $23, $23, -0x230
beq $23, $0, .+12
nop
sw $0, 0($4)
addiu $24, $24, -0x240
beq $24, $0, .+12
nop
sw $0, 0($4)
addiu $25, $25, -0x250
beq $25, $0, .+12
nop
sw $0, 0($4)
addiu $30, $30, -0x300
beq $30, $0, .+12
nop
sw $0, 0($4)
jr $31
nop
.end vRegTest2
|
