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| author | Craig Topper <craig.topper@gmail.com> | 2014-01-05 04:55:55 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2014-01-05 04:55:55 +0000 |
| commit | 01cb7fa9776fbe4952e7fea9ed67822da845b416 (patch) | |
| tree | a17aaed0899c06499bfa9ef6d66f13da5eabe756 | |
| parent | 2b5dc939482602667228490bb4ff2a3dc0395213 (diff) | |
| download | llvm-01cb7fa9776fbe4952e7fea9ed67822da845b416.tar.gz llvm-01cb7fa9776fbe4952e7fea9ed67822da845b416.tar.bz2 llvm-01cb7fa9776fbe4952e7fea9ed67822da845b416.tar.xz | |
Mark x86 _alt instructions as AsmParserOnly so they will be omitted from disassembler without string matches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198545 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrAVX512.td | 6 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrSSE.td | 4 | ||||
| -rw-r--r-- | utils/TableGen/X86RecognizableInstr.cpp | 3 |
3 files changed, 6 insertions, 7 deletions
diff --git a/lib/Target/X86/X86InstrAVX512.td b/lib/Target/X86/X86InstrAVX512.td index 80402d6aa7..6f25272866 100644 --- a/lib/Target/X86/X86InstrAVX512.td +++ b/lib/Target/X86/X86InstrAVX512.td @@ -701,7 +701,7 @@ multiclass avx512_cmp_scalar<RegisterClass RC, X86MemOperand x86memop, (outs VK1:$dst), (ins RC:$src1, x86memop:$src2, CC:$cc), asm, [(set VK1:$dst, (OpNode (VT RC:$src1), (ld_frag addr:$src2), imm:$cc))], IIC_SSE_ALU_F32P_RM>, EVEX_4V; - let neverHasSideEffects = 1 in { + let isAsmParserOnly = 1, hasSideEffects = 0 in { def rri_alt : AVX512Ii8<0xC2, MRMSrcReg, (outs VK1:$dst), (ins RC:$src1, RC:$src2, i8imm:$cc), asm_alt, [], IIC_SSE_ALU_F32S_RR>, EVEX_4V; @@ -770,7 +770,7 @@ multiclass avx512_icmp_cc<bits<8> opc, RegisterClass KRC, [(set KRC:$dst, (OpNode (vt RC:$src1), (memop_frag addr:$src2), imm:$cc))], IIC_SSE_ALU_F32P_RM>, EVEX_4V; // Accept explicit immediate argument form instead of comparison code. - let neverHasSideEffects = 1 in { + let isAsmParserOnly = 1, hasSideEffects = 0 in { def rri_alt : AVX512AIi8<opc, MRMSrcReg, (outs KRC:$dst), (ins RC:$src1, RC:$src2, i8imm:$cc), asm_alt, [], IIC_SSE_ALU_F32P_RR>, EVEX_4V; @@ -824,7 +824,7 @@ multiclass avx512_cmp_packed<RegisterClass KRC, RegisterClass RC, (X86cmpm (vt RC:$src1), (memop addr:$src2), imm:$cc))], d>; // Accept explicit immediate argument form instead of comparison code. - let neverHasSideEffects = 1 in { + let isAsmParserOnly = 1, hasSideEffects = 0 in { def rri_alt : AVX512PIi8<0xC2, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2, i8imm:$cc), !strconcat("vcmp", suffix, diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index d591433413..aaf9706e44 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -2299,7 +2299,7 @@ multiclass sse12_cmp_scalar<RegisterClass RC, X86MemOperand x86memop, Sched<[itins.Sched.Folded, ReadAfterLd]>; // Accept explicit immediate argument form instead of comparison code. - let neverHasSideEffects = 1 in { + let isAsmParserOnly = 1, hasSideEffects = 0 in { def rr_alt : SIi8<0xC2, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2, i8imm:$cc), asm_alt, [], IIC_SSE_ALU_F32S_RR>, Sched<[itins.Sched]>; @@ -2454,7 +2454,7 @@ multiclass sse12_cmp_packed<RegisterClass RC, X86MemOperand x86memop, Sched<[WriteFAddLd, ReadAfterLd]>; // Accept explicit immediate argument form instead of comparison code. - let neverHasSideEffects = 1 in { + let isAsmParserOnly = 1, hasSideEffects = 0 in { def rri_alt : PIi8<0xC2, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2, i8imm:$cc), asm_alt, [], itins.rr, d>, Sched<[WriteFAdd]>; diff --git a/utils/TableGen/X86RecognizableInstr.cpp b/utils/TableGen/X86RecognizableInstr.cpp index fffca0fc96..6d8b8a6e5b 100644 --- a/utils/TableGen/X86RecognizableInstr.cpp +++ b/utils/TableGen/X86RecognizableInstr.cpp @@ -508,8 +508,7 @@ RecognizableInstr::filter_ret RecognizableInstr::filter() const { return FILTER_WEAK; // Filter out alternate forms of AVX instructions - if (Name.find("_alt") != Name.npos || - (Name.find("r64r") != Name.npos && Name.find("r64r64") == Name.npos && Name.find("r64r8") == Name.npos) || + if ((Name.find("r64r") != Name.npos && Name.find("r64r64") == Name.npos && Name.find("r64r8") == Name.npos) || Name.find("_64mr") != Name.npos || Name.find("rr64") != Name.npos) return FILTER_WEAK; |