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authorJim Grosbach <grosbach@apple.com>2011-09-15 16:04:13 +0000
committerJim Grosbach <grosbach@apple.com>2011-09-15 16:04:13 +0000
commit07d7f3d387739b52f0fccd7c9d7bb54b0195f56c (patch)
tree86552019ecf1ab929220300df6b811af938ed176
parent57b21e437a4746e8c3c26531cb233bac953cc5e2 (diff)
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Re-order test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139795 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--test/MC/ARM/basic-thumb2-instructions.s35
1 files changed, 18 insertions, 17 deletions
diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s
index 63f7f37423..7e78b6c55f 100644
--- a/test/MC/ARM/basic-thumb2-instructions.s
+++ b/test/MC/ARM/basic-thumb2-instructions.s
@@ -477,6 +477,24 @@ _func:
@------------------------------------------------------------------------------
+@ IT
+@------------------------------------------------------------------------------
+@ Test encodings of a few full IT blocks, not just the IT instruction
+
+ iteet eq
+ addeq r0, r1, r2
+ nopne
+ subne r5, r6, r7
+ addeq r1, r2, #4
+
+@ CHECK: iteet eq @ encoding: [0x0d,0xbf]
+@ CHECK: addeq r0, r1, r2 @ encoding: [0x88,0x18]
+@ CHECK: nopne @ encoding: [0x00,0xbf]
+@ CHECK: subne r5, r6, r7 @ encoding: [0xf5,0x1b]
+@ CHECK: addeq r1, r2, #4 @ encoding: [0x11,0x1d]
+
+
+@------------------------------------------------------------------------------
@ LDMIA
@------------------------------------------------------------------------------
ldmia.w r4, {r4, r5, r8, r9}
@@ -1328,23 +1346,6 @@ _func:
@------------------------------------------------------------------------------
-@ IT
-@------------------------------------------------------------------------------
-@ Test encodings of a few full IT blocks, not just the IT instruction
-
- iteet eq
- addeq r0, r1, r2
- nopne
- subne r5, r6, r7
- addeq r1, r2, #4
-
-@ CHECK: iteet eq @ encoding: [0x0d,0xbf]
-@ CHECK: addeq r0, r1, r2 @ encoding: [0x88,0x18]
-@ CHECK: nopne @ encoding: [0x00,0xbf]
-@ CHECK: subne r5, r6, r7 @ encoding: [0xf5,0x1b]
-@ CHECK: addeq r1, r2, #4 @ encoding: [0x11,0x1d]
-
-@------------------------------------------------------------------------------
@ SUB (register)
@------------------------------------------------------------------------------
sub.w r5, r2, r12, rrx