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| author | Eli Friedman <eli.friedman@gmail.com> | 2011-11-09 22:25:12 +0000 |
|---|---|---|
| committer | Eli Friedman <eli.friedman@gmail.com> | 2011-11-09 22:25:12 +0000 |
| commit | 0948f0acca745eef8db6922edfd8836f717396b4 (patch) | |
| tree | 5650fb2d39d1efec5a2397026bbfb51078ce7e5e | |
| parent | 7346347674f03868e8c076c8c27a7f09f0a086c2 (diff) | |
| download | llvm-0948f0acca745eef8db6922edfd8836f717396b4.tar.gz llvm-0948f0acca745eef8db6922edfd8836f717396b4.tar.bz2 llvm-0948f0acca745eef8db6922edfd8836f717396b4.tar.xz | |
Add check so we don't try to perform an impossible transformation. Fixes issue from PR11319.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144216 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/SelectionDAG/TargetLowering.cpp | 3 | ||||
| -rw-r--r-- | test/CodeGen/ARM/2011-11-09-BitcastVectorDouble.ll | 15 |
2 files changed, 17 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 3596d6cdf6..d7bad4385e 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -1783,7 +1783,8 @@ bool TargetLowering::SimplifyDemandedBits(SDValue Op, case ISD::BITCAST: // If this is an FP->Int bitcast and if the sign bit is the only // thing demanded, turn this into a FGETSIGN. - if (!Op.getOperand(0).getValueType().isVector() && + if (!Op.getValueType().isVector() && + !Op.getOperand(0).getValueType().isVector() && NewMask == APInt::getSignBit(Op.getValueType().getSizeInBits()) && Op.getOperand(0).getValueType().isFloatingPoint()) { bool OpVTLegal = isOperationLegalOrCustom(ISD::FGETSIGN, Op.getValueType()); diff --git a/test/CodeGen/ARM/2011-11-09-BitcastVectorDouble.ll b/test/CodeGen/ARM/2011-11-09-BitcastVectorDouble.ll new file mode 100644 index 0000000000..2ab6a4fcc9 --- /dev/null +++ b/test/CodeGen/ARM/2011-11-09-BitcastVectorDouble.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s +; PR11319 + +@src1_v2i16 = global <2 x i16> <i16 0, i16 1> +@res_v2i16 = global <2 x i16> <i16 0, i16 0> + +declare <2 x i16> @foo_v2i16(<2 x i16>) nounwind + +define void @test_neon_call_return_v2i16() { +; CHECK: test_neon_call_return_v2i16: + %1 = load <2 x i16>* @src1_v2i16 + %2 = call <2 x i16> @foo_v2i16(<2 x i16> %1) nounwind + store <2 x i16> %2, <2 x i16>* @res_v2i16 + ret void +} |