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| author | Benjamin Kramer <benny.kra@googlemail.com> | 2014-06-06 21:08:55 +0000 |
|---|---|---|
| committer | Benjamin Kramer <benny.kra@googlemail.com> | 2014-06-06 21:08:55 +0000 |
| commit | 0da5960e5b7473b97fbb891e0b2761d3012ba724 (patch) | |
| tree | 3bf2471d1ba6ca1ab3520da28d5fd2242e2dcce8 | |
| parent | 013321a0f9e9f784ebb9a78ebf19e5f5099d5b16 (diff) | |
| download | llvm-0da5960e5b7473b97fbb891e0b2761d3012ba724.tar.gz llvm-0da5960e5b7473b97fbb891e0b2761d3012ba724.tar.bz2 llvm-0da5960e5b7473b97fbb891e0b2761d3012ba724.tar.xz | |
X86: Don't turn shifts into ands if there's another use that may not check for equality.
Fixes PR19964.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210371 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 2 | ||||
| -rw-r--r-- | test/CodeGen/X86/cmp.ll | 13 |
2 files changed, 14 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 9e728c7f7a..24cc828aca 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -10162,7 +10162,7 @@ SDValue X86TargetLowering::EmitTest(SDValue Op, unsigned X86CC, SDLoc dl, // If we have a constant logical shift that's only used in a comparison // against zero turn it into an equivalent AND. This allows turning it into // a TEST instruction later. - if ((X86CC == X86::COND_E || X86CC == X86::COND_NE) && + if ((X86CC == X86::COND_E || X86CC == X86::COND_NE) && Op->hasOneUse() && isa<ConstantSDNode>(Op->getOperand(1)) && !hasNonFlagsUse(Op)) { EVT VT = Op.getValueType(); unsigned BitWidth = VT.getSizeInBits(); diff --git a/test/CodeGen/X86/cmp.ll b/test/CodeGen/X86/cmp.ll index cdcdc963ed..149d53759f 100644 --- a/test/CodeGen/X86/cmp.ll +++ b/test/CodeGen/X86/cmp.ll @@ -198,3 +198,16 @@ define i32 @test14(i32 %mask, i32 %base, i32 %intra) #0 { ; CHECK: shrl $7, %edi ; CHECK-NEXT: cmovnsl %edx, %esi } + +; PR19964 +define zeroext i1 @test15(i32 %bf.load, i32 %n) { + %bf.lshr = lshr i32 %bf.load, 16 + %cmp2 = icmp eq i32 %bf.lshr, 0 + %cmp5 = icmp uge i32 %bf.lshr, %n + %.cmp5 = or i1 %cmp2, %cmp5 + ret i1 %.cmp5 + +; CHECK-LABEL: test15: +; CHECK: shrl $16, %edi +; CHECK: cmpl %esi, %edi +} |