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| author | Jim Grosbach <grosbach@apple.com> | 2011-07-25 23:32:14 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-07-25 23:32:14 +0000 |
| commit | 185f92e7d019bc52413a2b082d61e35c80f8b597 (patch) | |
| tree | efe160a35182aafa80d3d31b1f8826a357ec78a4 | |
| parent | c9a7c8dd1e540506d5f4e4649a25ecaa8808ba4b (diff) | |
| download | llvm-185f92e7d019bc52413a2b082d61e35c80f8b597.tar.gz llvm-185f92e7d019bc52413a2b082d61e35c80f8b597.tar.bz2 llvm-185f92e7d019bc52413a2b082d61e35c80f8b597.tar.xz | |
ARM assembly parsing and encoding for SSAX, SSUB16 and SSUB8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136013 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | test/MC/ARM/basic-arm-instructions.s | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s index b00b70b7b4..16d3fd0c89 100644 --- a/test/MC/ARM/basic-arm-instructions.s +++ b/test/MC/ARM/basic-arm-instructions.s @@ -1643,6 +1643,29 @@ _func: @------------------------------------------------------------------------------ +@ SSAX +@------------------------------------------------------------------------------ + ssax r2, r3, r4 + ssaxlt r2, r3, r4 + +@ CHECK: ssax r2, r3, r4 @ encoding: [0x54,0x2f,0x13,0xe6] +@ CHECK: ssaxlt r2, r3, r4 @ encoding: [0x54,0x2f,0x13,0xb6] + +@------------------------------------------------------------------------------ +@ SSUB16/SSUB8 +@------------------------------------------------------------------------------ + ssub16 r1, r0, r6 + ssub16ne r5, r3, r2 + ssub8 r9, r2, r4 + ssub8eq r5, r1, r2 + +@ CHECK: ssub16 r1, r0, r6 @ encoding: [0x76,0x1f,0x10,0xe6] +@ CHECK: ssub16ne r5, r3, r2 @ encoding: [0x72,0x5f,0x13,0x16] +@ CHECK: ssub8 r9, r2, r4 @ encoding: [0xf4,0x9f,0x12,0xe6] +@ CHECK: ssub8eq r5, r1, r2 @ encoding: [0xf2,0x5f,0x11,0x06] + + +@------------------------------------------------------------------------------ @ STM* @------------------------------------------------------------------------------ stm r2, {r1,r3-r6,sp} |