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author | Nate Begeman <natebegeman@mac.com> | 2005-04-05 22:36:56 +0000 |
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committer | Nate Begeman <natebegeman@mac.com> | 2005-04-05 22:36:56 +0000 |
commit | 1867054643c20c3027421ab7711664b4d55fe4c6 (patch) | |
tree | 2a7362b349c714127fc3b94b15a7c34301853d96 | |
parent | 2513ddc239143ad33cdf026548d9145245b26dcb (diff) | |
download | llvm-1867054643c20c3027421ab7711664b4d55fe4c6.tar.gz llvm-1867054643c20c3027421ab7711664b4d55fe4c6.tar.bz2 llvm-1867054643c20c3027421ab7711664b4d55fe4c6.tar.xz |
Add MULHU and MULHS nodes for the high part of an (un)signed 32x32=64b
multiply.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21102 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | include/llvm/CodeGen/SelectionDAGNodes.h | 2 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h index 568f66c9f6..cdb84eef47 100644 --- a/include/llvm/CodeGen/SelectionDAGNodes.h +++ b/include/llvm/CodeGen/SelectionDAGNodes.h @@ -90,7 +90,7 @@ namespace ISD { // Simple binary arithmetic operators. - ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, + ADD, SUB, MUL, MULHU, MULHS, SDIV, UDIV, SREM, UREM, // Bitwise operators. AND, OR, XOR, SHL, SRA, SRL, diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 105d39d1fa..858b8ddab8 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -1130,6 +1130,8 @@ const char *SDNode::getOperationName() const { case ISD::ADD: return "add"; case ISD::SUB: return "sub"; case ISD::MUL: return "mul"; + case ISD::MULHU: return "mulhu"; + case ISD::MULHS: return "mulhs"; case ISD::SDIV: return "sdiv"; case ISD::UDIV: return "udiv"; case ISD::SREM: return "srem"; |